TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

i am on 12900KS , 6600 MDIE gskill. and well if u have seen my posts,  u can see how cursed 2.xx bioses are. 

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

i am on 12900KS , 6600 MDIE gskill. and well if u have seen my posts,  u can see how cursed 2.xx bioses are. 

I believe you, hence my starting passage. I was afraid to make this post, but I see a lot of people are afraid to tune memory and they assume that this BIOS will kill their board, so some aren’t even putting in their new chips. Inherently there’s always a risk with anything tech, but this is just my anecdote. I also have a YT where you an observe evidence of certain claims I’ve made, with the point being that some boards will react fine to this BIOS. I’m not an engineer so I can’t comment on what and why this sort of crap happens on some boards and not on others.

babayega
HT OFF 1.15 BIOS
https://cdn.discordapp.com/attachments/1031625507457998878/1034727932570116186/IMG_0199.jpg 
HT OFF 2.03 BIOS
https://cdn.discordapp.com/attachments/1031625507457998878/1034722830992019476/IMG_0195.jpg
HT ON 2.03 BIOS
https://cdn.discordapp.com/attachments/1031625507457998878/1034722929906298920/IMG_0194.jpg
HT ON 1.15 BIOS
https://cdn.discordapp.com/attachments/1031625507457998878/1034723211033714718/IMG_0191.jpg

ECORES ARE DISABLED
 
perf also tanks on 2.xx bioses. (this was at 6600 , i dont remember if twrrdsg timing is cursed on this bios like the 2.01 bios, cause if it is then the perf issue makes sense).. 

I truly am sorry this is happening to you. The tech industry seems to suck nowadays. Some people get super lucky and some just don’t. I don’t even understand why there’s so much variance with how certain electronic components behave under certain conditions. I don’t see any logical reason why you should be observing performance issues. It’s truly anomalous.

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

600% HCI doesnt mean its stable. *stability* varies between people to people. most people do not check training consistency, retrain stability, multiple different stress tests , because again there is no 1 test that tests everything, each test stress diff parts of the system. also i do know that most people are unaware of the timing math etc. there are certain errors that cannot be caught by stress tests.

I haven’t found retrain stability on the Dark whatsoever. I’ve used a Taichi, two Strix-Fs and a M0EAY0 Apex, so believe me I know what retrain instability is and how to catch it.

600% I’ve found to be a happy point where I don’t waste my time and where I am fairly confident that the setup is usable as a daily. TM5 has allowed errors that HCI would catch to slip through, so if not HCI then I don’t know. I don’t use a case and I have air cooling at max RPM, so the highest temps I observe at various voltages are at the peek of HCI. I also tested during the mid afternoon on a sunny spring day so I’m confident it isn’t pseudo stability due to icy weather.

If you don’t believe 600% HCI is stable then that’s fair enough, a lot of known tuners in the space do though. I’ve observed well known tuners regarding 100% and 250% as sufficient, and BZ has been around the 600 figure in his last few videos. I decided on 600 because I’ve observed an error at just over 500 with 1T.

7000 finishing off testing:
https://youtu.be/86GGo75D54s

7200:
https://youtu.be/kBXtyU-ODjg

I can come across as annoying to some, so I’d suggest maybe just checking out what you need and then avoiding my videos thereafter. I also have a OneDrive with quite a few Linpack and IBT runs being completed arbitrarily alongside various OCs. Basically you never observe math errors due to the RAM after reboots. I’ve also found that when I make adjustments, errors come predictably. You can deduce why you’re erroring and what to adjust. This is something you can never do on retrain plagued boards with broken PCBs.

babayega

TheAffxct

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

600% HCI doesnt mean its stable. *stability* varies between people to people. most people do not check training consistency, retrain stability, multiple different stress tests , because again there is no 1 test that tests everything, each test stress diff parts of the system. also i do know that most people are unaware of the timing math etc. there are certain errors that cannot be caught by stress tests.

I haven’t found retrain stability on the Dark whatsoever. I’ve used a Taichi, two Strix-Fs and a M0EAY0 Apex, so believe me I know what retrain instability is and how to catch it.

600% I’ve found to be a happy point where I don’t waste my time and where I am fairly confident that the setup is usable as a daily. TM5 has allowed errors that HCI would catch to slip through, so if not HCI then I don’t know. I don’t use a case and I have air cooling at max RPM, so the highest temps I observe at various voltages are at the peek of HCI. I also tested during the mid afternoon on a sunny spring day so I’m confident it isn’t pseudo stability due to icy weather.

If you don’t believe 600% HCI is stable then that’s fair enough, a lot of known tuners in the space do though. I’ve observed well known tuners regarding 100% and 250% as sufficient, and BZ has been around the 600 figure in his last few videos. I decided on 600 because I’ve observed an error at just over 500 with 1T.

well see thats the thing tho. u dont know if it will error if u run it till 2000%. right? and i probably spent ehh maybe over 500hrs of testing on this platform .. so.. yea.. also i have used this board and the z590 dark for the intel OC comp , placed 2nd , so ig that would give u some perspective abt my experience maybe. 
 
https://imgur.com/a/H5dkIzj (what do u think of this lol? i cant imagine how this is even possible lol)
V2.01 BUG 12900KS GSKILL 6600 MDIE
the only diff between the pics is the mem freq... the twrrd sg timing is completely scuffed.  56 is correct which is TWTRL + CWL + 10 ... 
v2.02 bios straight up doesnt work
v2.03 is weird, post code 52 after changing mem freq, can only change mem freq after clearing cmos, didnt bother testing v2.03 further after i found this bug. 
v1.15 is the last stable bios for ADL. 
 
 

I’m not terribly sure. I can observe you set the tWTRS and L values, which I’ve found one should absolutely not do on any ADL/RPL setup. I’ve found that tWRRDsg/dg -6 - (tCWL) works 100% of the time on ASUS, MSI and EVGA (tested and confirmed with different more than a few kits and chips as well). The equation is always the tertiary value minus six minus tCWL. For this reason, I tend to raise the tertiaries when I raise CAS. I’ve heard Luumi mention stability as a result of reducing CAS, and I think that cascade effect on tCWL and thus the resultant tWTRs is related. When you raise CAS, the tWTRs drop. I dunno about minimum values, but I’ve *seen* 8 tWTRS and 20 tWTRL. Both of which are incredibly hard to lock in. I settle on 12/24 because I don’t have the energy to tighten further.

With regards to the BZ thing, you can update the Linpack binary for the app so he likely has already done that being that his LDA is correctly set. When I run Linpack my LDA is 22XXX because I don’t know how to do complicated file stuff and only found out about the math library thing due to Falkentyne on OCN.

With regard to the 2000% HCI thing; I didn’t major in math at uni so I can’t really make an educated argument, but AFAIK the longer a test has been running, the less likely the test will observe an error unless the testing conditions significantly change to a degree to where your hardware is no longer capable. I.e., unless my RAM temps were going to spike to 55c miraculously at 1200%, there’s no logical reason why they would error that late. The thing I observed with 1T seemed to happen at a specific point past 500%. I know this because I tested it to 500% and thought it was stable, when I did a re-test I found that it would error at around 515%. 1T has been a very weird experience for me and errors come in large bunches and cause random insta-BSODs due to some of other external mechanism that I do not understand. 2T has been A-ok hunky dory sunshine and roses easy peasy to configure.

DDR5 TWR/RTP RELATION 
https://imgur.com/a/axLlVdx
DDR4 TWR/RTP RELATION 
https://imgur.com/a/6W1jn5N
most people just reduce timings with no idea how things work/connected. 
these are from documentations. 
 

TheAffxct

babayega

TheAffxct

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

600% HCI doesnt mean its stable. *stability* varies between people to people. most people do not check training consistency, retrain stability, multiple different stress tests , because again there is no 1 test that tests everything, each test stress diff parts of the system. also i do know that most people are unaware of the timing math etc. there are certain errors that cannot be caught by stress tests.

I haven’t found retrain stability on the Dark whatsoever. I’ve used a Taichi, two Strix-Fs and a M0EAY0 Apex, so believe me I know what retrain instability is and how to catch it.

600% I’ve found to be a happy point where I don’t waste my time and where I am fairly confident that the setup is usable as a daily. TM5 has allowed errors that HCI would catch to slip through, so if not HCI then I don’t know. I don’t use a case and I have air cooling at max RPM, so the highest temps I observe at various voltages are at the peek of HCI. I also tested during the mid afternoon on a sunny spring day so I’m confident it isn’t pseudo stability due to icy weather.

If you don’t believe 600% HCI is stable then that’s fair enough, a lot of known tuners in the space do though. I’ve observed well known tuners regarding 100% and 250% as sufficient, and BZ has been around the 600 figure in his last few videos. I decided on 600 because I’ve observed an error at just over 500 with 1T.

well see thats the thing tho. u dont know if it will error if u run it till 2000%. right? and i probably spent ehh maybe over 500hrs of testing on this platform .. so.. yea.. also i have used this board and the z590 dark for the intel OC comp , placed 2nd , so ig that would give u some perspective abt my experience maybe. 
 
https://imgur.com/a/H5dkIzj (what do u think of this lol? i cant imagine how this is even possible lol)
V2.01 BUG 12900KS GSKILL 6600 MDIE
the only diff between the pics is the mem freq... the twrrd sg timing is completely scuffed.  56 is correct which is TWTRL + CWL + 10 ... 
v2.02 bios straight up doesnt work
v2.03 is weird, post code 52 after changing mem freq, can only change mem freq after clearing cmos, didnt bother testing v2.03 further after i found this bug. 
v1.15 is the last stable bios for ADL. 
 
 

I’m not terribly sure. I can observe you set the tWTRS and L values, which I’ve found one should absolutely not do on any ADL/RPL setup. I’ve found that tWRRDsg/dg -6 - (tCWL) works 100% of the time on ASUS, MSI and EVGA (tested and confirmed with different more than a few kits and chips as well). The equation is always the tertiary value minus six minus tCWL. For this reason, I tend to raise the tertiaries when I raise CAS. I’ve heard Luumi mention stability as a result of reducing CAS, and I think that cascade effect on tCWL and thus the resultant tWTRs is related. When you raise CAS, the tWTRs drop. I dunno about minimum values, but I’ve *seen* 8 tWTRS and 20 tWTRL. Both of which are incredibly hard to lock in. I settle on 12/24 because I don’t have the energy to tighten further.

With regards to the BZ thing, you can update the Linpack binary for the app so he likely has already done that being that his LDA is correctly set. When I run Linpack my LDA is 22XXX because I don’t know how to do complicated file stuff and only found out about the math library thing due to Falkentyne on OCN.

With regard to the 2000% HCI thing; I didn’t major in math at uni so I can’t really make an educated argument, but AFAIK the longer a test has been running, the less likely the test will observe an error unless the testing conditions significantly change to a degree to where your hardware is no longer capable. I.e., unless my RAM temps were going to spike to 55c miraculously at 1200%, there’s no logical reason why they would error that late. The thing I observed with 1T seemed to happen at a specific point past 500%. I know this because I tested it to 500% and thought it was stable, when I did a re-test I found that it would error at around 515%. 1T has been a very weird experience for me and errors come in large bunches and cause random insta-BSODs due to some of other external mechanism that I do not understand. 2T has been A-ok hunky dory sunshine and roses easy peasy to configure.

i run a chiller setup with memory waterblock , so i have controlled temps. if u dont have memory timing errors(math related), u do not need to run for extended period of time(but u do need to ensure that the board trains consistently, so retrain stability is imp, usually when u are on the edge u can face retrain/training consistency issue where the board (for z690 dark) will hit 54(post code) and start the memory initializing process again. , but if u dont follow the rules, sometimes u will see these 1 single errors pop up after a long stress test sessions.. these can be fixed if people follow the rules. 

TheAffxct

babayega

TheAffxct

babayega

TheAffxct

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

600% HCI doesnt mean its stable. *stability* varies between people to people. most people do not check training consistency, retrain stability, multiple different stress tests , because again there is no 1 test that tests everything, each test stress diff parts of the system. also i do know that most people are unaware of the timing math etc. there are certain errors that cannot be caught by stress tests.

I haven’t found retrain stability on the Dark whatsoever. I’ve used a Taichi, two Strix-Fs and a M0EAY0 Apex, so believe me I know what retrain instability is and how to catch it.

600% I’ve found to be a happy point where I don’t waste my time and where I am fairly confident that the setup is usable as a daily. TM5 has allowed errors that HCI would catch to slip through, so if not HCI then I don’t know. I don’t use a case and I have air cooling at max RPM, so the highest temps I observe at various voltages are at the peek of HCI. I also tested during the mid afternoon on a sunny spring day so I’m confident it isn’t pseudo stability due to icy weather.

If you don’t believe 600% HCI is stable then that’s fair enough, a lot of known tuners in the space do though. I’ve observed well known tuners regarding 100% and 250% as sufficient, and BZ has been around the 600 figure in his last few videos. I decided on 600 because I’ve observed an error at just over 500 with 1T.

well see thats the thing tho. u dont know if it will error if u run it till 2000%. right? and i probably spent ehh maybe over 500hrs of testing on this platform .. so.. yea.. also i have used this board and the z590 dark for the intel OC comp , placed 2nd , so ig that would give u some perspective abt my experience maybe. 

https://imgur.com/a/H5dkIzj (what do u think of this lol? i cant imagine how this is even possible lol)
V2.01 BUG 12900KS GSKILL 6600 MDIE
the only diff between the pics is the mem freq... the twrrd sg timing is completely scuffed.  56 is correct which is TWTRL + CWL + 10 ... 
v2.02 bios straight up doesnt work
v2.03 is weird, post code 52 after changing mem freq, can only change mem freq after clearing cmos, didnt bother testing v2.03 further after i found this bug. 
v1.15 is the last stable bios for ADL. 

I’m not terribly sure. I can observe you set the tWTRS and L values, which I’ve found one should absolutely not do on any ADL/RPL setup. I’ve found that tWRRDsg/dg -6 - (tCWL) works 100% of the time on ASUS, MSI and EVGA (tested and confirmed with different more than a few kits and chips as well). The equation is always the tertiary value minus six minus tCWL. For this reason, I tend to raise the tertiaries when I raise CAS. I’ve heard Luumi mention stability as a result of reducing CAS, and I think that cascade effect on tCWL and thus the resultant tWTRs is related. When you raise CAS, the tWTRs drop. I dunno about minimum values, but I’ve *seen* 8 tWTRS and 20 tWTRL. Both of which are incredibly hard to lock in. I settle on 12/24 because I don’t have the energy to tighten further.

TWTRL/S are not real registers , same with TWR. they are just added internal delay. those registers are not present in the imc. on the dark twtrl/s is used to control TWRRD SG/DG , and TWR is used to control TWRPRE/PDEN. the math for TWRRD SG = TWTRL + CWL + 10 (ddr5 , ddr4 its +6) , TWRRD DG  = TWTRS + CWL + 10 . DG stands for different group timings, and they are always short, due to not needing to recharge like with same group(long). 

I am aware they don’t exist. All I can say to you is that I’ve found that you must absolutely leave their value auto and the equation is tWRRDsg/dg minus six minus tCWL. You don’t have to take my word for it, but my resultant register values are always correct and have been correct on at least 5 different board with at least 5 different CPUs and 5 or more kits. The equation never changes.

https://imgur.com/a/H5dkIzj
its not abt the equation. in the above ss, i didnt change anything except for freq. u can see the auto twrrd sg timing completely broke when i changed my frew from 7k to 6.6k , this does not happen on the 1.15 bios. 
and FYI, if u want to try.. i can send u my DDR5 math sheet. (i will write some of them down below)
TWTRS/L - 4/16 min floor then 6/24 , 8/32 . 
u need to leave twrrd sg/dg auto. 
TRAS  = RTP+RCD(min floor)
RDRDSG = CCDL (MIN FLOOR) ( CCDL is not open on the dark and is locked to RRDL)
WRWRSG = CCDLWR2 (CCDLX2/RRDLX2)
so WRWRSG min floor it can go is 16 for ddr5
and RDRDSG is 8 
FAW 32 min , and RRDL / RRDS 8 is the min for DDR5. 

TheAffxct

babayega

TheAffxct

babayega

TheAffxct

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

600% HCI doesnt mean its stable. *stability* varies between people to people. most people do not check training consistency, retrain stability, multiple different stress tests , because again there is no 1 test that tests everything, each test stress diff parts of the system. also i do know that most people are unaware of the timing math etc. there are certain errors that cannot be caught by stress tests.

I haven’t found retrain stability on the Dark whatsoever. I’ve used a Taichi, two Strix-Fs and a M0EAY0 Apex, so believe me I know what retrain instability is and how to catch it.

600% I’ve found to be a happy point where I don’t waste my time and where I am fairly confident that the setup is usable as a daily. TM5 has allowed errors that HCI would catch to slip through, so if not HCI then I don’t know. I don’t use a case and I have air cooling at max RPM, so the highest temps I observe at various voltages are at the peek of HCI. I also tested during the mid afternoon on a sunny spring day so I’m confident it isn’t pseudo stability due to icy weather.

If you don’t believe 600% HCI is stable then that’s fair enough, a lot of known tuners in the space do though. I’ve observed well known tuners regarding 100% and 250% as sufficient, and BZ has been around the 600 figure in his last few videos. I decided on 600 because I’ve observed an error at just over 500 with 1T.

well see thats the thing tho. u dont know if it will error if u run it till 2000%. right? and i probably spent ehh maybe over 500hrs of testing on this platform .. so.. yea.. also i have used this board and the z590 dark for the intel OC comp , placed 2nd , so ig that would give u some perspective abt my experience maybe. 

https://imgur.com/a/H5dkIzj (what do u think of this lol? i cant imagine how this is even possible lol)
V2.01 BUG 12900KS GSKILL 6600 MDIE
the only diff between the pics is the mem freq... the twrrd sg timing is completely scuffed.  56 is correct which is TWTRL + CWL + 10 ... 
v2.02 bios straight up doesnt work
v2.03 is weird, post code 52 after changing mem freq, can only change mem freq after clearing cmos, didnt bother testing v2.03 further after i found this bug. 
v1.15 is the last stable bios for ADL. 

I’m not terribly sure. I can observe you set the tWTRS and L values, which I’ve found one should absolutely not do on any ADL/RPL setup. I’ve found that tWRRDsg/dg -6 - (tCWL) works 100% of the time on ASUS, MSI and EVGA (tested and confirmed with different more than a few kits and chips as well). The equation is always the tertiary value minus six minus tCWL. For this reason, I tend to raise the tertiaries when I raise CAS. I’ve heard Luumi mention stability as a result of reducing CAS, and I think that cascade effect on tCWL and thus the resultant tWTRs is related. When you raise CAS, the tWTRs drop. I dunno about minimum values, but I’ve *seen* 8 tWTRS and 20 tWTRL. Both of which are incredibly hard to lock in. I settle on 12/24 because I don’t have the energy to tighten further.

With regards to the BZ thing, you can update the Linpack binary for the app so he likely has already done that being that his LDA is correctly set. When I run Linpack my LDA is 22XXX because I don’t know how to do complicated file stuff and only found out about the math library thing due to Falkentyne on OCN.

With regard to the 2000% HCI thing; I didn’t major in math at uni so I can’t really make an educated argument, but AFAIK the longer a test has been running, the less likely the test will observe an error unless the testing conditions significantly change to a degree to where your hardware is no longer capable. I.e., unless my RAM temps were going to spike to 55c miraculously at 1200%, there’s no logical reason why they would error that late. The thing I observed with 1T seemed to happen at a specific point past 500%. I know this because I tested it to 500% and thought it was stable, when I did a re-test I found that it would error at around 515%. 1T has been a very weird experience for me and errors come in large bunches and cause random insta-BSODs due to some of other external mechanism that I do not understand. 2T has been A-ok hunky dory sunshine and roses easy peasy to configure.

i run a chiller setup with memory waterblock , so i have controlled temps. if u dont have memory timing errors(math related), u do not need to run for extended period of time(but u do need to ensure that the board trains consistently, so retrain stability is imp, usually when u are on the edge u can face retrain/training consistency issue where the board (for z690 dark) will hit 54(post code) and start the memory initializing process again. , but if u do, sometimes u will see these 1 single errors pop up after a long stress test sessions.. these can be fixed if people follow the rules. 

Taichi: Re-train errors when VDD2 set manually and XMP enabled while tuning (it will try to auto match VDD2 to your memory VDD).

Strix-Fs: So many re-train issues I can’t even describe them in a reasonable length of time. Just assume that you need to worry about every voltage rail and you better hope the PCB impedance is good. My two samples were vastly different.

Apex: Holy moly.

Friend’s Carbon: Good stuff.

Dark: The king of D5 undefeated and undisputed (nothing).

for me 1.15 bios 6800c30 1t is the max stable i can run on the dark. JEDEC lvl stability. 4/16 twtrs/l and stuff. 

babayega

TheAffxct

babayega

TheAffxct

babayega

TheAffxct

babayega

TheAffxct
I don’t know if this post is going to be helpful or annoying. I’m not trying to flex, because frankly, there are people daily’ing 8200C32 already.

My findings on 2.03 are:
1. No discernible bugs with my trash 13700K and decent M-die.
2. 7000C34 @ 1.455VDD/1.365VDDQ and 7200C32 @ 1.605VDD/1.515VDDQ with CKE Power Down disabled are both 600% HCI stable on a terrible 13700K sample.
3. No weirdness regarding IMC voltages. They scale normally and as expected. 7000 is doable with 1.0VSA and 1.25TXVDDQ, while I use 1.25VSA and 1.4TXVDDQ for 7200.

I’m not sure if this is a sample-dependent thing or just dumb luck, but in my case things are working perfectly (knock on wood). 2.03 IMO can be a great BIOS depending on how your board sample reacts to it.

600% HCI doesnt mean its stable. *stability* varies between people to people. most people do not check training consistency, retrain stability, multiple different stress tests , because again there is no 1 test that tests everything, each test stress diff parts of the system. also i do know that most people are unaware of the timing math etc. there are certain errors that cannot be caught by stress tests.

I haven’t found retrain stability on the Dark whatsoever. I’ve used a Taichi, two Strix-Fs and a M0EAY0 Apex, so believe me I know what retrain instability is and how to catch it.

600% I’ve found to be a happy point where I don’t waste my time and where I am fairly confident that the setup is usable as a daily. TM5 has allowed errors that HCI would catch to slip through, so if not HCI then I don’t know. I don’t use a case and I have air cooling at max RPM, so the highest temps I observe at various voltages are at the peek of HCI. I also tested during the mid afternoon on a sunny spring day so I’m confident it isn’t pseudo stability due to icy weather.

If you don’t believe 600% HCI is stable then that’s fair enough, a lot of known tuners in the space do though. I’ve observed well known tuners regarding 100% and 250% as sufficient, and BZ has been around the 600 figure in his last few videos. I decided on 600 because I’ve observed an error at just over 500 with 1T.

well see thats the thing tho. u dont know if it will error if u run it till 2000%. right? and i probably spent ehh maybe over 500hrs of testing on this platform .. so.. yea.. also i have used this board and the z590 dark for the intel OC comp , placed 2nd , so ig that would give u some perspective abt my experience maybe. 

https://imgur.com/a/H5dkIzj (what do u think of this lol? i cant imagine how this is even possible lol)
V2.01 BUG 12900KS GSKILL 6600 MDIE
the only diff between the pics is the mem freq... the twrrd sg timing is completely scuffed.  56 is correct which is TWTRL + CWL + 10 ... 
v2.02 bios straight up doesnt work
v2.03 is weird, post code 52 after changing mem freq, can only change mem freq after clearing cmos, didnt bother testing v2.03 further after i found this bug. 
v1.15 is the last stable bios for ADL. 

I’m not terribly sure. I can observe you set the tWTRS and L values, which I’ve found one should absolutely not do on any ADL/RPL setup. I’ve found that tWRRDsg/dg -6 - (tCWL) works 100% of the time on ASUS, MSI and EVGA (tested and confirmed with different more than a few kits and chips as well). The equation is always the tertiary value minus six minus tCWL. For this reason, I tend to raise the tertiaries when I raise CAS. I’ve heard Luumi mention stability as a result of reducing CAS, and I think that cascade effect on tCWL and thus the resultant tWTRs is related. When you raise CAS, the tWTRs drop. I dunno about minimum values, but I’ve *seen* 8 tWTRS and 20 tWTRL. Both of which are incredibly hard to lock in. I settle on 12/24 because I don’t have the energy to tighten further.

With regards to the BZ thing, you can update the Linpack binary for the app so he likely has already done that being that his LDA is correctly set. When I run Linpack my LDA is 22XXX because I don’t know how to do complicated file stuff and only found out about the math library thing due to Falkentyne on OCN.

With regard to the 2000% HCI thing; I didn’t major in math at uni so I can’t really make an educated argument, but AFAIK the longer a test has been running, the less likely the test will observe an error unless the testing conditions significantly change to a degree to where your hardware is no longer capable. I.e., unless my RAM temps were going to spike to 55c miraculously at 1200%, there’s no logical reason why they would error that late. The thing I observed with 1T seemed to happen at a specific point past 500%. I know this because I tested it to 500% and thought it was stable, when I did a re-test I found that it would error at around 515%. 1T has been a very weird experience for me and errors come in large bunches and cause random insta-BSODs due to some of other external mechanism that I do not understand. 2T has been A-ok hunky dory sunshine and roses easy peasy to configure.

i run a chiller setup with memory waterblock , so i have controlled temps. if u dont have memory timing errors(math related), u do not need to run for extended period of time(but u do need to ensure that the board trains consistently, so retrain stability is imp, usually when u are on the edge u can face retrain/training consistency issue where the board (for z690 dark) will hit 54(post code) and start the memory initializing process again. , but if u do, sometimes u will see these 1 single errors pop up after a long stress test sessions.. these can be fixed if people follow the rules. 

Taichi: Re-train errors when VDD2 set manually and XMP enabled while tuning (it will try to auto match VDD2 to your memory VDD).

Strix-Fs: So many re-train issues I can’t even describe them in a reasonable length of time. Just assume that you need to worry about every voltage rail and you better hope the PCB impedance is good. My two samples were vastly different.

Apex: Holy moly.

Friend’s Carbon: Good stuff.

Dark: The king of D5 undefeated and undisputed (nothing).

for me 1.15 bios 6800c30 1t is the max stable i can run on the dark. JEDEC lvl stability. 4/16 twtrs/l and stuff. 

That’s really good to hear. 4/16 is extremely tight and I’m yet to observe those kinds of numbers. If they’re doable then they’re doable. In my experience I couldn’t do much lower than 12/24 (I once did 8/20) and I never set the values on their registers in the secondary column because Asus boards do not react well to it and setting them via the WRRDs with my equation is just far easier.

Dschless
Re: people without issues. I don’t doubt that. I found out I have some bent pins on my board because I was too lazy to remove my board or put my computer case horizontal when swapping in the 13900k a few times. My case (Corsair 1000D) feels about 80 lbs so I try to avoid that.

As with the other person this happened to, I’m really sorry about that. For what sorry is worth. Bent pins are the worst.

babayega
have u tried occt large avx 2 extreme ecores off ht off. i have found on ADL , it is really good for catching memory errors related with cpu. try to pass 1hr of occt. dont know how 13th gen will behave.. but.. 

I’m happy with how things are right now tbh. I've had the Dark for a few months now and I’m yet to experience any issues related to app corruption or any sort of weird crashes/BSODs. HCI 600% has been sufficient so long as 2T (not that I can figure out 1T anyway). As I said, stabilising 7000-7200 as long as your IMC and kit are happy and error-less, should be as easy as pie. These data rates are a joke to the Dark. There are already individuals daily’ing well into the 8000s on the Dark. Any sort of weird instability at such low data rates should not even be much of a concern.

zerocool101

Taxiking

B0baganoosh
I noticed on the Classified with 13900k and 2.03 bios, if I left it on default settings it never boosts to 5.8GHz, even with temps are below 60°C. At default I was running CB-R23 with a package temp of 65°C and hitting 40.1k points, but running single-thread it never went over 5.5GHz. I remember people talking about this in 12900k. Was it C-states that had to be disabled to make that work right?
 
I did a ratio-limit OC and that made the CPU actually boost for lighter work-loads, but at default it would not. Just thought I'd report that.
 
OH...and I did find one old bug. If I have HWiNFO64 open and try to run CPU-z, it crashes on the SPD read. I had gotten to the point where this no longer happened with my 12900k with BIOS 1.10. I did have C-states disabled though (on 12900k), so I'm not sure if that made a difference with this or not.

i notice same issue
13900k + Classified and never boosts to 5.8. stay at 5.5GHz

Noticing this as well 13900k never goes over 5.5GHz, I don't see 5.8. Is this a 2.03 BIOS issue?

All p-core boost is 5.5 which is normal.

Hello, I have the same issue, 13900kf never boosting above 5.5, and noticed that it happens when I set Ram to manual. If set to auto then the cpu boost normally up to 5.8. Don’t know if related but I use adie green pcb.

zerocool101

Sajin

zerocool101

Taxiking

B0baganoosh
I noticed on the Classified with 13900k and 2.03 bios, if I left it on default settings it never boosts to 5.8GHz, even with temps are below 60°C. At default I was running CB-R23 with a package temp of 65°C and hitting 40.1k points, but running single-thread it never went over 5.5GHz. I remember people talking about this in 12900k. Was it C-states that had to be disabled to make that work right?

I did a ratio-limit OC and that made the CPU actually boost for lighter work-loads, but at default it would not. Just thought I'd report that.

OH...and I did find one old bug. If I have HWiNFO64 open and try to run CPU-z, it crashes on the SPD read. I had gotten to the point where this no longer happened with my 12900k with BIOS 1.10. I did have C-states disabled though (on 12900k), so I'm not sure if that made a difference with this or not.

i notice same issue
13900k + Classified and never boosts to 5.8. stay at 5.5GHz

Noticing this as well 13900k never goes over 5.5GHz, I don't see 5.8. Is this a 2.03 BIOS issue?

All p-core boost is 5.5 which is normal.

 
Ya, but 2 cores should boost to 5.8 on the 13900k.

That is only if 1-2 are being used. If they are all being used then they will all run at 5.5.