The ability to overclock is in the chipset because that is where the clock generator is buried, that's how Intel limits certain Sandy Bridge CPUs to overclock in certain boards and how flexible they can be; same logic should be the case with Xeons-- provded EVGA tweaked a version of the C60x chipset that SR-X uses.  Then my guess at the very least most of the Xeon E5's will overclock like non-K parts with a minimum amount of give.  Thus there must be at least one unlocked Xeon this time.

CUDA/OPENCL applications can saturate the x8 bus and ALL build in vram. specially if these are dual gpu cards 

EVGA_JacobF

MySchizoBuddy

how many are x16 PCIe 3 slots?  

Depends how many cards you run. 3 cards they will all run x16, 4 cards 2 of them will run x8.

what about running all 6 or 7 are they at x8 or they drop to x4

EVGA_JacobF

MySchizoBuddy

how many are x16 PCIe 3 slots?  

Depends how many cards you run. 3 cards they will all run x16, 4 cards 2 of them will run x8.

 
With two processors there are 80-lanes. Why can't 4 cards run x16? That would leave 16 additional lanes to route to other slots or use for other purposes.

Brocasta
Here's what he said on OCN:

EVGA-JacobF
PCI-E lanes are generated by 1st CPU only.

The ASUS Z9PE-D8-WS does not use the nVidia bridge chip, there for will be a better solution for those running mega cuda cards.  Also they got rid of those silly extra ram slots that any true oc'er will never use since they increase load on the memory controller.
Let me say I'm a huge fan of EVGA, but they totally flubbed the pci-e lane configuration of this board.  It isn't a problem not to have all pci-e slots active with only on processor installed.  people will not be buying this board with the intent of installing a second processor a year or two later, not going to happen.

The ASUS Z9PE-D8-WS does not use the nVidia bridge chip

 
Neither does the EVGA SR-X.

In that circumstance, all except the 6th slot will run x8 PCIe 3?

what is that chip next to the pci-e slots?  when will the block diagram be released?
 
If no bridge chip then why not use all the pci-e lanes off of both processors?

Brocasta
He said it's not an nvidia bridge chip.

AND I ASKED WHAT IT WAS!

linuxrouter
With two processors there are 80-lanes. Why can't 4 cards run x16? That would leave 16 additional lanes to route to other slots or use for other purposes.

We still don't know what the actual layout configuration is, the 16/16/8/8 layout may be if four dual-slot cards were stuck in there. 

rottenmutt
what is that chip next to the pci-e slots?

a variant of the Patsburg chipset, i.e. southbridge.

rottenmutt
when will the block diagram be released?

You may have to wait for a visual guide just like EVGA did with SR-2.  Besides, I answered that back on page 3.

rottenmutt
If no bridge chip then why not use all the pci-e lanes off of both processors?

 I'm curious of this as well, though it may have something to do with the rest of the layout; whatever was sacrficed for better overclocking.  Either way, it will test users brand loyality whether they want to overclock both Xeon E5's or willing to go for another board that may not overclock as well just to have more lane support.

EVGA_JacobF

MySchizoBuddy

how many are x16 PCIe 3 slots?  

Depends how many cards you run. 3 cards they will all run x16, 4 cards 2 of them will run x8.

 
That is what I originally thought ( http://forums.evga.com...67&mpage=1#1379636 ), but EVGA_MatthewH said the "SR-X will support 4-way SLI at full 16x for each slot." I guess he was just misinformed or the final specs were not out then. I would be interested in why only one CPU is being used for the PCIe slots. My only guess is that the SLI specifications don't allow 2 CPUs to power the slots. If that is the case, and if ASUS does not use a bridge chip, don't expect their board to support SLI (unless if they say otherwise). Remember, they showed off their board using Tesla cards, not GeForce cards in SLI. It is a workstation board after all.
 
In retrospect though, this is PCIe 3.0. The difference between x8 and x16 is minimal for now. Although I don't know how much latency the bridge chip adds.

EVGA_JacobF
We are using a PLX chip for PCI-E 3.0.

Can I ask why you choose not to use the pci-e functionality in the second processor?
http://www.plxtech.com/pr..ts/expresslane/switches

SLI works off of two north bridges, ask supermicro and asus.

Now it is undetermined if OC'ing CPUs will even be available. So at this point the asus board would has better pcie bandwidth. Not to mention it dont have a silly memory config.

On the Asus board there are seven PCI-Express 3.0 x16 expansion slots, from which four (blue) are x16 capable, and three (black) x8 capable.

A few more details on the SR-X thanks to some fine details on the photos that have been released:
We already know the PCIe setup is as follows:
[x16/x8, x8, x16/x8, x8]=connected via x16 lane using a PLX PEX 8747 PCIe 3.0 switch ( http://www.plxtech.com/pr.ucts/expresslane/pex8747 ), x16/x8, x4, x8
Another x4 lane connects to the South Bridge for SAS support, using all 40 lanes from the primary CPU.
 
Now looking at the pictures, I have a better idea what chips are connected to the South Bridge:
 
Ethernet Controllers: 2x Intel 82574L Gigabit Ethernet Controllers
http://ark.intel.com/prod...it-Ethernet-Controller
Reasoning: We know that the board uses Gigabit Ethernet. Looking at pictures of the board, you will find 2 Intel Gigabit Ethernet controllers, both of which are connected via 64-pins. Looking at Intel's site, there are only three Single Gigabit Ethernet Controllers that interface via PCIe that use a 64-pin design: 82574IT, 82583V, and 82574L. 82574IT is the industrial version of the 82574L, so that can't be it. The 82583V is not a product I normally find in dual Intel Gigabit motherboards, the 82574L is, leading me to think the 82574L is used. In addition, the 82574L supports Jumbo Frames, something a highend motherboard like SR-X would probably support.
 
eSATA controller: 1x Marvell 88SE9220
http://www.marvell.com/st...92xx-Product-Brief.pdf
Reasoning: This one was easy. Looking at the board, you will find a Marvell chip right behind the eSATA ports. The fact that it is a Marvell chip is easily identified by the logo. Looking closely, you will notice that the chip uses only 56 pins. Luckily, only one of Marvell's SATA controllers uses 56-pins, the 88SE9220. One thing to note about this controller is the ability to connect it via x1 or x2 PCIe 2.0 connection. Most likely EVGA used a x2 connection considering that they have an abundance of PCIe 2.0 connections on this motherboard. There simply would be no reason not to. This would guarantee 500MB/s speeds on both those eSATA ports if both are being equally maxed.
 
Back Panel USB 3.0 Controller: 2x ASMedia ASM1042
http://www.asmedia.com.tw...=100&cate_index=98
Reasoning: After examining the photos for a little bit, I spotted the ASMedia logo (first looked like a C-Media logo which would be impossible because the board already uses Realtek for an audio codec). The controller is located in between the 2 Intel Ethernet controllers, just behind the USB 3.0 ports. I couldn't find much information on the controller, but I think it only supports 2 ports. I was able to find the second chip below the secondary processor's DIMMs.
 
Onboard USB 3.0 Controller: 1x ASMedia ASM1042
http://www.asmedia.com.tw...=100&cate_index=98
Reasoning: There are no good photos of the onboard USB 3.0 controller chip on the SR-X, but the logo looked similar to the back panel chip and there is no reason to use different controllers.
 
Onboard Firewire Controller: 1x TI XIO2213B
http://www.ti.com/product/xio2213b
Reasoning: Again, the photos of the bottom of the board are not that great, but this is what I have. The logo on the controller appears to be a TI logo. I cannot spot a PCI bridge on the motherboard, indicating that the Firewire controller should be able to connect via a PCIe interface. TI makes 2 Firewire Controllers that connect via PCIe, the XIO2213B and the XIO2200A. According to the X79 Classified manual, 1394b is optional, indicating that the controller used on that motherboard is one that supports 1394b. The XIO2200A only supports 1394a, leaving only the XIO2213B to be used on the X79 Classified. I assume the chip used on the X79 Classified will be the same one used on the SR-X.
 
Audio Codec: Realtek ALC898
Reasoning: The audio codec is definitely Realtek, supports 8-channel audio, and uses a 48-pin connection. That really doesn't limit the options. I say it probably is the ALC898 since that is what the X79 Classified uses.
 
In short, I currently count the use of all 8 out of the 8 available PCIe 2.0 links from the South Bridge. (x2 for the dual Gigabit, x2 for the eSATA, x2 for the 4 external USB 3.0 ports, x1 for the 2 internal USB 3.0 ports, and x1 for the internal Firewire.) Of course, I could be wrong on a few of the chips. Whoever gets this board should be able to verify which chips are used. As a note of reference, I used the Photosynth photos of the board located here:
http://photosynth.net/vie...4f50-ae10-a25d35d33d73
 
I also used Jacob's leaked photo of the SR-X on Twitter located here:
http://twitpic.com/73bm7z

If you look at the onboard ports at the bottom of the board, you will see 1 blue port/pin layout, 3 red ports/pin layouts, and 1 white port/pin layout. The blue one is for USB 3.0. The red ones are for USB 2.0. The white one is for Firewire. It is labeled "1394B HDR" aka Firewire 1394B Header. The same port/pin layout is on the Classified X79.
 
As far as the usefulness of Firewire, it was one of those technologies that never broke through since it was costly to implement it. Nevertheless, there are applications where it is superior to USB, for instance, with the use of external audio DACs (normally very expensive ones). This is a good read on how Firewire is superior to USB for those types of applications:
http://www.weiss-highend....chnicalBackground.html

There is an optical S/PDIF port on the back with the other audio ports.