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Helpful ReplyHot!My Arduino-based RAM SPD reader/writer (free and open source)

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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2021/12/08 04:05:25 (permalink)
I messed up SA1 controls in the latest FW, will post a fixed update in a few hours. In the meantime, grab the working FW here:
https://github.com/1a2m3/...re/SpdReaderWriter.ino
 
Fixed, see one post below
post edited by a213m - 2021/12/08 16:00:03

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2021/12/08 15:59:27 (permalink)
Here's the full release: 20211208

GUI

  • Includes FW 20211208

Firmware

  • Fixed SA1 control
 

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2021/12/28 04:21:59 (permalink)
Hi!
I finally got a DDR4 adapter, tried to read some memory. With some modules, software cannot connect to the device. Got "nothing found" in port selection dialog. it tooks some time before I thought of connecting with no module, uncheck  "I2C fast mode" and then insert the memory module. Maybe it's better to detect the device at a low I2C speed?
 
P.S. with 10K pull-up resistors from +3.3V to SDA and SCL lines device connects in both I2C modes
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2021/12/28 14:19:30 (permalink)
Confirmed, pull up resistors are required for anything faster than standard mode. I'll prepare a new build which will allow connecting to device when fast mode is enabled with DIMM present without pull up resistors to gracefully disable fast mode from the GUI.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2021/12/28 17:30:19 (permalink)
Here you go: 20211228

GUI

  • Fixed port not being released after failed connection

Firmware

  • Improved connection compatibility

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/02/02 16:12:31 (permalink)
New version with a small changelog but a major feature update: 20220202

GUI

  • Added support to read and write system DDR4 RAM SPDs on Intel X299 platforms
 
About:
 
This release will let you read and write system memory SPDs on Intel LGA2066/X299 motherboards, just like the full version of Thaiphoon Burner.
 
Yes, you got that right. This is a pure software solution.
This feature does not rely on Arduino or other external programming device. (External Arduino-based devices are still supported, though.)
Tested on Windows 10 x64, but should work on 32-bit and 64-bit versions of Windows XP and later.
 
How to use:
  1. If you are running an RGB-capable memory, disable dynamic RGB effects, or set color to static!
  2. Run "spdrwgui.exe" as admin.
  3. Click "Connect" and select a device. The numbers represent CPU SMBus controllers in the PCI configuration space.
    The last number represents SMBus number.*
  4. Use Read/Write/Verify/Check RSWP buttons as usual to perform desired tasks.
    If you have more than one DIMM per bus, you will be asked to choose its I2C address.*
 
*
Bus numbering and addressing:
 
Skylake-X and Cascade Lake-X systems don't use chipset SMBus to access RAM SPD's, instead they rely on internal memory controllers' SMBuses accessible via PCI configuration space.
On my system (and most X299 boards) there are 2 controllers, one for each group of DIMMs located on either side of the CPU.
Bus 0 controls slots located to the left of CPU socket, next to the IO area, whereas bus 1 controls the other group of slots to the right of CPU socket.
Each bus provides access to DIMM EEPROMs via a unique address. The addresses are not in the same order as slots appear on the motherboard.
 
Refer to the image below for bus numbering and addressing:
 

 
Implementing X299 hardware support took a lot of time and resources, so I would appreciate if you support my efforts.
If you like this update and want more platforms added in the future releases, please consider donating using links in the About window.
 
Edited: formatting, typos
post edited by a213m - 2022/02/03 12:45:38

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/02/03 10:13:57 (permalink)
thanks for the new update

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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/02/08 20:23:59 (permalink)
New version: 20220208

GUI

  • Fixed reading from serial device returning invalid data due to broken address setting
  • Fixed write protection not being checked before writing on X299
  • Fixed retry button not working upon write error
  • Added option to disable RGB warning
  • Improved X299 RSWP detection
  • Improved SMBus detection

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/02/20 17:42:28 (permalink)
New version with several fixes and new features: 20220220

GUI

  • Fixed data verification not being performed after partial writes to partially protected EEPROMs
  • Fixed incorrect "multiple EEPROMs" warning message when checking RSWP on serial device
  • Fixed crash that occurred when checking RSWP on serial device
  • Added detailed SMBus info under Device>Info menu
  • Added option to connect to SMBus on startup
  • Added human-friendly SMBus naming
 

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/02/22 16:08:53 (permalink)
New version: 20220222

GUI

  • Added support to read and write system DDR3 RAM SPDs on Intel desktop LGA1156, 1155, and 1150 systems, as well as mobile 5/6/7/8/9 series platforms *
  • Fixed unhandled exception crash on AMD systems when running program as admin
 
*
Just like my X299 update from February 02, this release adds support for mainstream Intel DDR3 platforms and will let you read and write system memory SPDs without additional hardware on these platforms:
  • LGA1156: H55, P55, H57, Q57
  • LGA1155: H61, B65, Q65, P67, H67, Q67, Z68, B75, Q75, Z75, H77, Q77, Z77
  • LGA1150: H81, B85, Q85, Q87, H87, Z87, Z97, H97
  • Mobile: NM10, PM55, HM55, HM57, QM57, QS57, HM65, HM67, UM67, QM67, QS67, NM70, HM70, HM75, HM76, UM77, HM77, QM77, QS77, HM86, QM87, HM87, HM97
X79 is not supported.
 
Mainstream DDR4 support is available but currently disabled, and if you have an Intel LGA1151 or LGA1200 board and want to test DDR4 support, PM me or respond here.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/03/24 13:42:35 (permalink)
New version: 20220324

GUI

  • Fixed crashes occurring when program is run without administrative privileges and SMBus autoconnect is enabled
  • Fixed inaccessible SMBus on non-English localized Windows

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/04/06 20:58:34 (permalink)
New version: 20220406

GUI

  • Fixed: RSWP capabilities not updating when switching between SMBus and Arduino
 
Besides that, this time driver is integrated into dll resources and gets loaded during runtime using Win32 System Services APIs, and all interaction with the driver is done using DeviceIoControl API.
This change is implemented only to reduce the number of files and overall project size. For end users there's no difference in performance, all functionality available before is still present.
(Original WinRing0 files are no longer included and if you still have them from previous releases you can safely delete them.)

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/04/11 20:09:57 (permalink)
New version with some cosmetic fixes and an updated Command-Line Interface (console) version: 20220411

GUI

  • Fixed: Screenshot tool capturing drop shadow area around main window (Win10/11)
  • Fixed: Screenshot tool not capturing full window after being maximized
  • Fixed: Startup update checker displaying message box upon error
  • Fixed: "Apply and Close" menu item text in "Settings" window
  • Fixed: "Close" button text in "Check RSWP" report window

CLI

  • Added: Save firmware to local directory command (use switch /firmware <PATH>)
  • Added: SMBus support (reading only)*
 
* To prevent malicious use, console version does not support writing to system memory SPDs. The GUI version still supports full functionality.
 
Common resources used by both GUI and CLI (firmware and driver files) have been moved to DLL in compressed form to reduce overall project size.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/05 18:51:21 (permalink)
New version after nearly a month of silence: 20220505
 

GUI

  • Fixed: Incorrect connection behavior when Arduino autoconnection is enabled and device is unplugged while being connected
  • Added: "Arduino" submenu to the "Device" menu for Arduino specific controls (settings and firmware)
  • Added: /savefirmware command line argument to save firmware files
  • Enhancement: Smbus autoconnection is instant
  • Redesigned: "Connect" window
  • Redesigned: "About" window

SMBus

  • Fixed: Inaccessible SMBus when launching a new instance of SPDRW after closing previous instance while at least one instance is still running
  • Added: support to read and write system DDR3/DDR4 RAM SPDs on Intel desktop LGA1151 and LGA1200 systems *
  • Added: older pre-PCH Intel ICH-ICH10 southbridges support *
  • Added: Intel C422 support *

Arduino firmware

  • Read device name padded with spaces for wider 3rd party software compatibility
  • Original I2C clock is restored before reporting RSWP capabilities

 
* This release adds support for mainstream Intel DDR4 platforms on LGA1151 and LGA1200 sockets, adds C422 support to LGA2066 list, and adds support for older pre-PCH Intel support.
 
Full list of added hardware support since the last release:
  • ICH: ICH, ICH0, ICH2, ICH2M, ICH3, ICH3M, ICH4, ICH4M, CICH, ICH5, ICH6M, ICH6W, ICH7DH, ICH7, ICH7M, ICH7MDH, ICH8, ICH8ME, ICH8DH, ICH8DO, ICH8M, ICH9DH, ICH9DO, ICH9R, ICH9ME, ICH9, ICH9M, ICH10DO, ICH10R, ICH10, ICH10D
  • LGA1151/1200 (incl. mobile): B150, B250, B360, B365, C232, C236, C242, C246, CM236, CM238, CM246, H110, H170, H270, H310, H310D, H310M, H370, HM170, HM175, HM370/HM470, Q150, Q170, Q250, Q270, Q370, QM170, QM175, QM370, Z170, Z270, Z370, Z390, B460, B560, C252, C256, H410, H470, H510, H570, Q470, Q570, W480, W580, Z490, Z590
  • LGA2066: C422

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/06 00:50:31 (permalink)
Hotfix: 20220506

GUI

  • Fixed: high idle CPU usage

SMBus

  • Fixed: unsupported platforms being improperly detected as valid

 
Oh well, despite thorough testing, a couple of bugs I didn't see slipped through.
Thus a hotfix 6 hours later. :)

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/06 10:11:43 (permalink)
the continued development of this is great to see

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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/07 18:59:30 (permalink)
Thanks. I got lots of plans ahead, so you'll definitely see more updates coming in the future.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/12 08:18:22 (permalink)
Hi, Would it be possible to do this with laptop so-dimms (ddr4 260-pin)?
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/12 13:22:19 (permalink)
Yes, all types of DDR4 are supported, including SODIMM.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/12 15:39:17 (permalink)
I'm almost ready to order all the stuff, but I'm stuck on deciding parts for OK 1:3. I don't think i have the skills needed to figure out what part i need...May i ask ?  What are you using?
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/05/12 15:54:16 (permalink)
I use PC817, just like in the first post under "parts list". I got mine from an old PSU.
 
For DDR4 you'll only need one optocoupler. SA1_CTL is for DDR3/DDR2 and modules with "_OPT" suffix will never be needed. (The schematic was created before DDR5 specs were publicly available and were included only for future-proofing, but as it turned out, they won't be ever needed.)

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/06/14 16:41:02 (permalink)
New version after a lengthy break: 20220614
 

GUI

  • Fixed: Connect button dropdown arrow is hidden when no device is connected
  • Added: Tooltips to some items in the Settings window

SMBus

  • Added: AMD AM4, AM1/FS1b, FM1, FM2, and FM2+ support *
* This release should also work with AMD X399 and TRX40 based systems, but it hasn't been tested. If you have any of such systems, please test it and report bugs if you find any.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/06/14 19:07:59 (permalink)
nice to see your still making updates

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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/06/28 01:41:07 (permalink)
New update: 20220628
 

GUI

  • Enhancement: Set RSWP option can be used to toggle or clear RSWP
  • Fixed: DDR5 SPD product information and CRC support
 
Previous versions with preliminary DDR5 support relied on proposed Jedec's JESD400-5 document revision 0.89 and 0.90 dated January 2020 floating around. Final specification is not publicly leaked, but based on the Micron's DDR5 SPD documents and several other commercially available DDR5 SPD dumps I've been able to acquire, checksummed data and checksum locations differ from the original outdated Jedec's proposed SPD contents. This release will work properly with DDR5 CRC checksums.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/08/02 15:34:43 (permalink)
New version with some fixes, enhancements, and more platform support: 20220802
 

GUI

  • Fixed: Crash occurring after writing SPDs with Arduino when program is run as normal user
  • Improved: Arduino firmware wizard opens destination directory contents in explorer
  • Improved: Arduino firmware wizard handles directory and file permission errors
  • Improved: Idle performance during open device selection dialog window
  • Updated: Manufacturer’s ID codes database (ref. JEP106BE, Jan 2022)

SMBus

  • Added: Nvidia nForce & MCP support *
Supported chipsets: Nforce2, Nforce3, Nforce4, MCP51, MCP55, MCP61, MCP65, MCP67, MCP73, MCP78S, and MCP79. Nforce and MCP89 are not supported.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/08/06 01:46:53 (permalink)
New version with some fixes and improvements: 20220806
 

GUI

  • Fixed: Crash when opening files by dragging them onto program icon
  • Improved: Manufacturer name lookup performance
  • Added: Thaiphoon Burner file (*.thp) support

SMBus

  • Fixed: SPD writing on Nvidia based platforms

CLI

  • Fixed: Compatibility with the latest DLL
 
 

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/09/07 18:44:50 (permalink)
No new version yet, but here's a preview of one of the features I'm currently working on.
 
This will add (requested and expected) editing capabilities, like in thousands of other hex editors out there.
 

 
 
 
 

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
Cool GTX
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/09/07 19:44:45 (permalink)
great stuff

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a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/10/27 14:06:28 (permalink)
Hotfix: 20221026
  • Fixed: Freeze issues when virtual or Bluetooth COM ports are present
This fixes GUI and CLI freezing issues when virtual or Bluetooth COM ports are present.
This release is marked as pre-release because it contains an updated dll only. To use, extract the archive into directory where you have v.20220806 located, overwriting the old file.
 
Full release with updated editor will be posted when it is ready.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
a213m
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Re: Would anyone be interested in open source and free DDR4 SPD reader/writer? 2022/11/11 15:16:30 (permalink)
Finally, a new version after weeks of lengthy development: 20221111

GUI

  • Fixed: Write protection check accuracy before writing when multiple devices are present on the same bus
  • Fixed: Delay when opening EEPROM menu when Arduino auto connect option is enabled
  • Updated: Thaiphoon Burner DDR5 & DDR4 file (*.thp) import support (TH52, TH42)
  • Updated: Manufacturer’s ID codes database (ref. JEP106BF.01, October 27, 2022)
  • Fixed: High idle CPU usage when Arduino auto connect option is enabled
  • Fixed: Freeze issues when virtual or Bluetooth COM ports are present
  • Improved significantly: Manufacturer name lookup performance
  • Added: Opacity effects when moving windows
  • Added: Data copy formats
  • Added: Data editor

CLI

  • Updated: Compatibility

Firmware

  • Added: Background I2C monitor
 
Apart from bugfixes and performance improvements, this release adds the most anticipated feature - the data editor.
 
The editor component had to be written from scratch, because there's no such control provided out of the box included with .NET framework. While there are a couple of third-party open source editors available, none have features I needed and are bloated with options that aren't necessary, so I wrote my own editor. Initially, I went the lazy route and used a bunch of text boxes to display each byte, but it turned out to be a performance nightmare, so the initial implementation was destined to be doomed. And I made the right decision to scrap the original code and start from scratch, but in the end it was worth the effort.
 
Editor features in no particular order:
  • Inline Hex editor:
  • Inline ASCII editor
  • Undo/redo capabilities
  • Navigation with arrow keys, pgup/pgdn keys, and home/end keys; scrolling follows cursor
  • Individual byte and bits editor:

  • Color coded states:
    • Normal data - black text
    • Unsaved data - red text
    • Redoable data - blue text
    • Active/inactive panel - white/grey background, respectively
    • Similar bytes - light blue background (disabled by default)
 
Please consider donating to show your support and encourage further development.

My free and open source SDR-DDR5 SPD reader/writer with write protection capabilities
 
New: 13900K, Z790 HERO, 2x32GB 6800C32, 4090, 2TB SN850, AX1600i
Old: 10980XE, X299SE2, 8x8GB 4000C15, 4090, 2TB SN850, AX1600i
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