PCIe 3.0 is the next evolution of the PCI Express I/O standard. At 8GT/s bit rate, the interconnect bandwidth is doubled over PCIe 2.0.
 
The PCIe 2.0 bit rate is specified at 5GT/s, but with the 20 percent performance overhead of the 8b/10b encoding scheme, the delivered bandwidth is actually 4Gbps. PCIe 3.0 removes the requirement for 8b/10b encoding and uses a more efficient 128b/130b encoding scheme instead. By removing this overhead, the interconnect bandwidth can be doubled to 8Gbps with the implementation of the PCIe 3.0 specification. This bandwidth is the same as an interconnect running at 10GT/s with the 8b/10b encoding overhead. In this way, the PCIe 3.0 specifications deliver the same effective bandwidth, but without the prohibitive penalties associated with 10GT/s signaling:
 
 
 
  
At the launch of Intel's LGA-2011 based Sandy Bridge E CPU there was finally had a platform capable of supporting PCI Express 3.0, but the market lacked a GPUs to test it. That all changed this past week as the Radeon HD 7970, the world's first 28nm GPU with support for PCIe 3.0, was tested.
 
The move to PCIe 3.0 increases per-lane bandwidth from 500MB/s to 1GB/s. For a x16 slot that means doubling bandwidth from 8GB/s under PCIe 2.1 to 16GB/s with PCIe 3.0. As seen in earlier reviews, there's hardly any difference between PCIe 2.1 x8 and x16 for modern day GPUs. The extra bandwidth of PCIe 3.0 wasn't expected to make any tangible difference in gaming performance and in our 7970 tests, it didn't.   
 
The PCIe 4.0 specifications  are expected to be available sometime in the 2014-2015 timeframe.
 
The bit rate for the PCIe 4.0 specification will be 16GT/s.  All studies confirmed the potential feasibility of 16GT/s signaling with low-cost enablers.

JacobF EVGA product mgr, posted there will be updated BIOS.  I cannot find that post right now.   IF you can't find it, just PM JacobF or MatthewH for the time frame. 

KenMcC

Matthew posted this reply on another Thread within last 24 hours:  "Working on it but no exact ETA yet. "  He also PMed me that the PCIe 3.0 support is almost 100% sure to be included in this  BIOS update. 

 
cool, great improvement for Z68 platform!

snichols

So are you saying that the z68 FTW will get a bios upgrade that will enable PCIe 3.0?

 
That is correct, but you also need a PCI-E capable CPU and card..i.e. an Ivy Bridge model and 680.
Not trying to condescending, I just have noticed many people don't understand this:)

Also on the FTW boards, you wil NOT see PCIe 3.0 on the lanes that run through the NF200 chip, you will only get 3.0 on the lane that is handled by the Ivy CPU itself.

KenMcC

Davevt31, you are correct no motherboard with NF200s can deliever more than PCIe 2.x on the output of the NF200s.   I would say,, just my understanding, is if all 16 PCIe lanes are switched to the First PCIe slot then PCIe 3.0 should be availbable to the GPU in that slot.  This does not mean I am correct, just that it makes sense. 

yup, that's how it is. PCIe 3.0 will be available only to the primary GPU lane which is routed straight to CPU ... that is if CPU is Ivy Bridge.
number of available lanes however will depend on the fact if other red slots are occupied or not. if not then all 16 lanes will be for primary GPU, if any other slot (for nf200) is occupied than only 8 lanes will be assigned to primary slot GPU.

Yes, but I do not know if in SLI what you get.  In my theory, you would get 1 slot of PCIe 3.0 x16 OR 2 Slots of PCIe 3.0 x8.  If you have GPU cards that are PCIe 2.2 , I would expect the PCIe buss would deliever at the PCIe 2.x rate / protocol at the same speeds given above for 1 or 2 Slots.   

^ thanks for a BR! took me a while to figure out what I received it for hehe

Johnny_Utah

Nice work Feniks!

With a Z77 Board, how will PCI-E 3.0 work?  Since some board will have the PLX chip in it?  Which slots will work with PCI-E 3.0?  Does it work differently than the NF200?

thanks! The diagram is borrowed, found it some time ago somewhere around here.
 
I read in documentation of PLX PEX 8417 that is uses all 16 native lanes from the CPU (as opposed to NF200 using only 8 of them), I would *guess* that every slot on Z77 board (except those black PCIe x1/x4 routed straight to Z77 chipset) is routed through PLX chip, so I would guess further that all "red" slots must be capable of running PCIe 3.0 with no problems on Z77.
 
The only question is regarding the number of actual (or rather switched) numbers of PCIe lanes getting assigned depending on placement of cards.

hah! point taken , of course I was thinking about P67/Z68 FTW, why not, after all it's what I have LOL!
 
so the rule would still apply to FTW models. missed the fact P67/Z68 SLI don't carry it so yeah, you are right on SLI PCIe lane speed on non-NF200 boards where all lanes are managed straight by the CPU, PCIe 3.0 8x/8x it shall be