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Hot!X570 FTW TPM

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optimadam
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2022/01/10 08:18:53 (permalink)
Hi,
 
Does anyone know if the X570 FTW has a physical TPM?

I have not noticed any reference to any kind of TPM function in the manual, hardware or software based. Do they call it something else on there boards, I did come across one article saying it was on the Dark.
 
Thanks
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    actualrootwyrm
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    Re: X570 FTW TPM 2022/01/26 11:50:11 (permalink)
    optimadam
    Hi,
     
    Does anyone know if the X570 FTW has a physical TPM?

    I have not noticed any reference to any kind of TPM function in the manual, hardware or software based. Do they call it something else on there boards, I did come across one article saying it was on the Dark.
     
    Thanks


     
    JC2 on both the X570 Dark and FTW is a 20-pin TPM header. On the FTW it's located next to the front panel connector.
    I never got a response from support on the pin-out or supported modules though. I don't even know if it's LPC or SPI.

    "Yes, I can and have overclocked that."
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    #2
    the_Scarlet_one
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    Re: X570 FTW TPM 2022/01/26 12:10:03 (permalink)
    I don’t have the x570 dark, but I have the x299 Dark as well as the X299 FTW, x299 Micro, and X299 Micro2, and all of them have built in TPM2.0. In the bios, they have an option for trusted computing that has to be turned on in the advanced options menu.

    I would start by verifying if the trusted computing option is in the advanced options menu to see if it is baked onto the board rather than a separate module.



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    #3
    the_Scarlet_one
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    Re: X570 FTW TPM 2022/01/26 12:23:20 (permalink)
    Page 57, top of the advanced menu, enable trusted computing:


    While the manual does explicitly mention TPM from what I can see, EVGA’s bios’ are usually very familiar, so start in the advanced menu and go from there.

    I am guessing that you are looking at enabling TPM for windows 11?



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    #4
    actualrootwyrm
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    Re: X570 FTW TPM 2022/01/26 12:42:19 (permalink)
    Nope, that is a totally different thing, and not what he is looking for.
     
    Intel and AMD have major platform differences. Intel has "PTT" which incorporates a soft-TPM in the IME element of the motherboard. AMD does not have an IME equivalent, and relies on the AMD PSP which is an on-die Arm core with TrustZone.
    This is the "AMD fTPM." The "f" in "fTPM" stands for 'firmware' but also stands for the F word you'll scream if you experience a CPU or motherboard failure. Just like Intel with IME-fused PTT, recovering the key after a failure of motherboard or CPU (either or) can be quite literally impossible. It is also up to the motherboard's BIOS to do it right, and basically, nobody does. (It's not their fault; it's Phoenix and AMI at fault there.) So a BIOS update might leave you completely locked out. Generally speaking, reference dTPM (discrete TPM) implementations are very stable and reliable.
    AMD fTPM is also still badly broken in Windows 11 as the Windows AIK somehow does not have AMD's trust keys. So it often can't enroll the certificate on Windows 10 or 11, which will result in no end of problems. Plus the Intel-favoring shenanigans in 11 mean the fTPM incurs a very significant performance hit including stuttering, significant delays, reduced disk throughput, etc.
    Point being, don't use AMD fTPM.
     
    You should always use a discrete TPM whenever possible, because a discrete TPM provides a tamper-resistant physical module which can be physically relocated with keys intact in the event other system components fail. A dTPM can also be safely and securely replaced in the event of a compromise for a much lower cost (typically $20-40,) or physically removed and secured to protect a system when not in use. With PTT and fTPM, you have to replace entire motherboards, processors, or both.

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    optimadam
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    Re: X570 FTW TPM 2022/01/26 16:39:15 (permalink)
    Woo actualrootwyrm is 100% correct and explained the problem way better than I would. We could talk about the next gen security chip (Pluton) that MS is pushing and which AMD is the first to implement, but that wouldn`t address my question and decision to buy the ftw board or not.
     
    Having the header on the board is a good start, we just need to get confirmation from EVGA on the supported modules. I don`t want buy the board and do some trial and error of TPM modules to find out which ones work. Then lose all my keys x amount of time later because they updates the firmware or decided they don't like that module
    #6
    random_matt
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    Re: X570 FTW TPM 2022/01/26 18:51:18 (permalink)
    optimadam
    Woo actualrootwyrm is 100% correct and explained the problem way better than I would. We could talk about the next gen security chip (Pluton) that MS is pushing and which AMD is the first to implement, but that wouldn`t address my question and decision to buy the ftw board or not.
     
    Having the header on the board is a good start, we just need to get confirmation from EVGA on the supported modules. I don`t want buy the board and do some trial and error of TPM modules to find out which ones work. Then lose all my keys x amount of time later because they updates the firmware or decided they don't like that module


    You enable ftpm in bios. You don't need a module. Knowledge is all on the internet, no idea what the other guy is spouting. I know tons of people on X570, promise this is all you need to do.

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    #7
    optimadam
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    Re: X570 FTW TPM 2022/01/26 21:52:20 (permalink)
    In short if you care about security, firmware tpm (ftpm) isn`t that secure.
     
    If you think about missile silos in the firms you have two people with the key to launch a rocket. That's because you don`t want one person to go rogue and just launch the rocket. This is a similar concept, you don't want to cpu to make all the decisions, so you have another device (physicals tpm) to check and store that information.
     
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    actualrootwyrm
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    Re: X570 FTW TPM 2022/01/28 08:22:33 (permalink)
    random_matt
     
    You enable ftpm in bios. You don't need a module. Knowledge is all on the internet, no idea what the other guy is spouting. I know tons of people on X570, promise this is all you need to do.




    No, you don't. And the garbage out there isn't 'knowledge.'
     
    I can guarantee you this "other guy" here has personally built more systems than EVGA has sold X570 Darks, and has been doing both OEM and ODM since before EVGA was even founded. I've probably built more systems than they've sold 3090's. And I quit doing anything but boutique in the desktop space back around '08. So everything I've shipped in the past 10+ years has required as much platform security as I can load on it. I am quite bluntly, probably more knowledgeable about platform security than EVGA's motherboard engineers. (Since they don't work with EPYC, and don't deal with PSB or Intel IME or AMT e-fuses. Frankly wish I didn't have to either.)
     
    fTPM is literally a lowest common denominator, least durability solution that was thrown in to have something since they couldn't trust ODMs to do the right thing, and Intel does it in the must-buy IME side. Nowhere in any of AMD's official documentation or guidance for ODMs or OEMs will you find a single recommendation to use fTPM over dTPM, or even to use fTPM at all. In fact, AMD themselves recommend against using fTPM and using a dTPM specifically because of , a necessary reliance on the motherboard manufacturer to implement it correctly in BIOS (which includes maintaining the VBIOS element,) and Microsoft introducing problems constantly.
    (No idea why the forum nuked the links.)
    post edited by actualrootwyrm - 2022/01/28 08:23:49

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    the_Scarlet_one
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    Re: X570 FTW TPM 2022/01/28 08:34:54 (permalink)
    The forum mules the links because even though you account is almost 16 years old, you only have 6 posts and the requirement for links is much more than 6.

    As far as firmware TPM versus discrete, I did not realize the difference initially, and greatly appreciate the new understanding that I have acquired.



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    #10
    Cool GTX
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    Re: X570 FTW TPM 2022/01/28 08:59:12 (permalink)
    actualrootwyrm
    random_matt
     
    You enable ftpm in bios. You don't need a module. Knowledge is all on the internet, no idea what the other guy is spouting. I know tons of people on X570, promise this is all you need to do.




    No, you don't. And the garbage out there isn't 'knowledge.'
     
    I can guarantee you this "other guy" here has personally built more systems than EVGA has sold X570 Darks, and has been doing both OEM and ODM since before EVGA was even founded. I've probably built more systems than they've sold 3090's. And I quit doing anything but boutique in the desktop space back around '08. So everything I've shipped in the past 10+ years has required as much platform security as I can load on it. I am quite bluntly, probably more knowledgeable about platform security than EVGA's motherboard engineers. (Since they don't work with EPYC, and don't deal with PSB or Intel IME or AMT e-fuses. Frankly wish I didn't have to either.)
     
    fTPM is literally a lowest common denominator, least durability solution that was thrown in to have something since they couldn't trust ODMs to do the right thing, and Intel does it in the must-buy IME side. Nowhere in any of AMD's official documentation or guidance for ODMs or OEMs will you find a single recommendation to use fTPM over dTPM, or even to use fTPM at all. In fact, AMD themselves recommend against using fTPM and using a dTPM specifically because of , a necessary reliance on the motherboard manufacturer to implement it correctly in BIOS (which includes maintaining the VBIOS element,) and Microsoft introducing problems constantly.
    (No idea why the forum nuked the links.)




    just add a space or two to the link
     
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    Thanks for the detailed information

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    actualrootwyrm
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    Re: X570 FTW TPM 2022/02/04 12:55:02 (permalink)
    So I have some TPM modules on order for testing, I should have some results next week. Unfortunately the one module known to work on earlier EVGA motherboards with an identical physical header is purest unobtanium. (Thanks, Windows 11.) However, as it's an Infineon SLB9665, there's a whole lot of options of varying quality and authenticity. For the record, I'm testing on an X570 Dark, but the FTW uses the same configuration and same DXEs to my knowledge.
     
     
    Pre-Result Disclaimer: I am not an EVGA employee, so any results are strictly unofficial. My test results are not certification, official, or guarantee of function or support. Installation or use of unsupported components may result in damage, data loss, or voiding of warranties. Incorrect configuration of TPM or operating systems may result in data loss. Test results are not an endorsement of any particular product or vendor by either myself or EVGA (because again, I do not speak for them.)


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    optimadam
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    Re: X570 FTW TPM 2022/02/04 17:35:35 (permalink)
    actualrootwyrm your awesome, look forward to find out the results.

    I love how the community has been 1000% more helpful the EVGA.
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    actualrootwyrm
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    Re: X570 FTW TPM 2022/02/07 09:13:43 (permalink)
    optimadam
    actualrootwyrm your awesome, look forward to find out the results.

    I love how the community has been 1000% more helpful the EVGA.



    Well, I certainly don't want to throw EVGA under the bus either. They're in basically an impossible position because they do have a previously validated dTPM for this header on other boards (assuming it's the same as other EVGA boards.) But to make an official statement of support, they first need to test and validate on these boards. Which requires obtaining said dTPM. You can't just reuse one for validation, because testing full function basically requires locking it to a board.
     
    So about that 'obtaining' part. I'm much better than EVGA at acquiring parts like that, simply because I have to do it far more often. So I have more sources and a faster PO system. I have had several of those dTPMs on order since August 4, 2020. Yeah. You have a better chance of getting a GPU than getting a dTPM at an appropriate price. ($100+ is not even remotely appropriate. The chip is $3.40 if you're buying just one from Mouser.) The only fabs manufacturing the SLB9665 have been down more than they've been up, so it was an issue even before Microsoft dropped the Windows 11 bomb on supply. And the main manufacturer may have discontinued the 20-pin part because they switched to a 14-pin format for new motherboard designs.
    What supplies are out there are from companies with names like 'Asdfiew' and 'Harghbleg' so, yeah. You can guess. And what they're selling aren't necessarily counterfeit parts, but definitely at best salvaged parts. And these parts may or may not have properly written firmware, duplicate unique identifiers, might contain bad certificates, or simply might be worn out (the NVRAM on dTPMs has very few write cycles.) Any of which obviously would defeat the whole purpose of the TPM. It's not a huge deal if you're just using it so you can play games on Windows 11 and not a target of industrial espionage, but it obviously is very much a security risk regardless.
     
    However, my hope is that once I have confirmation of a working part, I'll be able to provide a pinout so that new 16/18 pin format parts from trustworthy manufacturers (i.e. ASRock, Supermicro, etc.) can be adapted including hopefully the Nuvoton NPCT650 parts which are much easier to source right now. Obviously, those parts will never be validated by EVGA as they simply do not fit the connector.

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    EVGATech_LeeM
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    Re: X570 FTW TPM 2022/02/07 10:26:02 (permalink)
    actualrootwyrm
    optimadam
    Hi,
     
    Does anyone know if the X570 FTW has a physical TPM?

    I have not noticed any reference to any kind of TPM function in the manual, hardware or software based. Do they call it something else on there boards, I did come across one article saying it was on the Dark.
     
    Thanks


     
    JC2 on both the X570 Dark and FTW is a 20-pin TPM header. On the FTW it's located next to the front panel connector.
    I never got a response from support on the pin-out or supported modules though. I don't even know if it's LPC or SPI.


    For what it's worth, I asked our team and they informed me that this header is for diagnostic purposes only, and not a physical TPM header.  However, that was my first impression when I saw the board.
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    actualrootwyrm
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    Re: X570 FTW TPM 2022/02/07 11:51:30 (permalink)
    EVGATech_LeeM
    actualrootwyrm
    JC2 on both the X570 Dark and FTW is a 20-pin TPM header. On the FTW it's located next to the front panel connector.
    I never got a response from support on the pin-out or supported modules though. I don't even know if it's LPC or SPI.


    For what it's worth, I asked our team and they informed me that this header is for diagnostic purposes only, and not a physical TPM header.  However, that was my first impression when I saw the board.




    That's definitely a headscratcher then, because they're probably the same team that said it was a TPM header! (I actually asked them back when the X570 Dark was announced.) I know it's not marked at all on the silkscreen - which you all did an awesome job on, by the way. But the details I got from multiple folks was that there was definitely a TPM header, but not which, and there was no officially supported module at this time. 
     
    The LPC TPM should be 13 or 14 conductors (1 or 2 GND) and will be be connected directly to the SuperIO to LPC pins. I don't have the pinout for the one that EVGA is using, but on Winbond it's usually pins 18 through 30 or some similar contiguous block. There should be one pin tied to PCI clock or a 33MHz source, a 24MHz or 48MHz source tied to both the SuperIO and connector, and then the rest are basically data lines. There's too many pins for JC2 to be JTAG (that's the connector above it. Don't tell anyone.)
    The other option would be SPI which would require a +1.8V, a 24MHz or 33MHz isolated clock (SPI CLK or SCLK,) 2 data lines, an interrupt, a reset, and a chip select line usually implemented via GPIO on the SuperIO but may be implemented as a specific interface.
     
    If they have an SPI TPM, that changes the game entirely. Because those, I have an absolute stack of both Infineon and Nuvoton.
    Also, then I have no idea where the promised TPM header is. 
    ... unless it's SPI located north of PCIe SW. Which I had assumed was strictly the SPI lines for the BIOS. Because, well, duh.
     
    Maybe the two of us should get with the engineers off the record and see what's what. Because the relevant DXE's definitely in the BIOS already, and JC2 is definitely pin-aligned to a Certain Competitor's LPC TPM Module. So my potentially flawed assumption was that they just carried that forward; it's certainly the smart and effective way.
     
    edit: hey Lee, grab a Dark, flip it over. Inch or so toward the power side from the PCIe4x slot, between that and the battery, near the unpopulated JM3. Do you see what I see? I'm going to be upset if those are correct and wired to JM3. Mostly because I need to get a card in that slot. Also because the header's unpopulated. Oh, and also because none of them are actually labeled.  
    post edited by actualrootwyrm - 2022/02/07 14:21:31

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    EVGATech_LeeM
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    Re: X570 FTW TPM 2022/02/08 17:46:04 (permalink)
    actualrootwyrm
    That's definitely a headscratcher then, because they're probably the same team that said it was a TPM header! (I actually asked them back when the X570 Dark was announced.) I know it's not marked at all on the silkscreen - which you all did an awesome job on, by the way. But the details I got from multiple folks was that there was definitely a TPM header, but not which, and there was no officially supported module at this time. 
     
    The LPC TPM should be 13 or 14 conductors (1 or 2 GND) and will be be connected directly to the SuperIO to LPC pins. I don't have the pinout for the one that EVGA is using, but on Winbond it's usually pins 18 through 30 or some similar contiguous block. There should be one pin tied to PCI clock or a 33MHz source, a 24MHz or 48MHz source tied to both the SuperIO and connector, and then the rest are basically data lines. There's too many pins for JC2 to be JTAG (that's the connector above it. Don't tell anyone.)
    The other option would be SPI which would require a +1.8V, a 24MHz or 33MHz isolated clock (SPI CLK or SCLK,) 2 data lines, an interrupt, a reset, and a chip select line usually implemented via GPIO on the SuperIO but may be implemented as a specific interface.
     
    If they have an SPI TPM, that changes the game entirely. Because those, I have an absolute stack of both Infineon and Nuvoton.
    Also, then I have no idea where the promised TPM header is. 
    ... unless it's SPI located north of PCIe SW. Which I had assumed was strictly the SPI lines for the BIOS. Because, well, duh.
     
    Maybe the two of us should get with the engineers off the record and see what's what. Because the relevant DXE's definitely in the BIOS already, and JC2 is definitely pin-aligned to a Certain Competitor's LPC TPM Module. So my potentially flawed assumption was that they just carried that forward; it's certainly the smart and effective way.
     
    edit: hey Lee, grab a Dark, flip it over. Inch or so toward the power side from the PCIe4x slot, between that and the battery, near the unpopulated JM3. Do you see what I see? I'm going to be upset if those are correct and wired to JM3. Mostly because I need to get a card in that slot. Also because the header's unpopulated. Oh, and also because none of them are actually labeled.  

    Double-checked with engineering.  It's a debug header.
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    optimadam
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    Re: X570 FTW TPM 2022/02/08 17:53:04 (permalink)
    Thanks for checking, its a shame its not there.

    Ill look at getting an Asus Motherboard instead then.
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    actualrootwyrm
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    Re: X570 FTW TPM 2022/02/13 17:38:07 (permalink)
    EVGATech_LeeM
    Double-checked with engineering.  It's a debug header.




    Clearly they think they're dealing with amateur hour or an idiot, and not somebody who might have more AMI licensing than they do, because they told you a straight up lie.
     
    JC2 is in fact, wired direct to the Winbond's LPC interface. JEC1 immediately above is either JTAG or SPI. And even if it is for LPC debug, the absolute minimum acceptable would be to provide the complete pinout. Keyed 20 is NOT a standard LPC connector or used by literally anything except two common LPC dTPM modules. Even ElmorLabs and OBT's LPC card uses 10 pins. And guess what? Yeah, LPC debug is done from the dTPM header!
    You don't populate the NXP's SPI header, but you leave another 25 pins fully populated for "debug only"? Look. I've been around decades. Nobody wastes that kind of money.
    Oh, and I already confirmed that the ground pins align with the 20-1 pin Asus / Gigabyte LPC TPM2.0 pinout. Which eliminates all other possibilities including JTAG. So yeah - I'm 100% certain they're lying. 

     
    So I'm just going to start calling engineering out on these lies. I honestly have to question if it wasn't deliberate sabotage to stay in Intel's good graces. There's literally no way EVGA did not know that fTPM is specifically advised against, that it has had security vulnerabilities in the past, that it has multiple outstanding known defects, and that TPM would be required for Windows 11. AMD won't even let you have AGESA access without you first acknowledging all of that. 
    These are super-premium priced motherboards. This level of either laziness or deliberate crippling just isn't acceptable, especially when it simply isn't found on boards that cost half as much.
    That goes triple for a board that is explicitly built for extreme overclocking and board-level modifications. You can't give users a Probelt, explicit permission to hook up DMMs and oscilloscopes, guarantees that replacing TIM won't void warranty, and then not provide detailed pinouts for every header you install. Doubly so when you give them detailed information on EVGA's hysteresis programming, 10+ pages of Nu Audio, and a completely unheard of 17 pages on how to set up RAID. $1000+ quad socket boards with dual U320 controllers didn't even have that many pages on RAID!
    Tacking on three more pages of pinout diagrams, not even remotely too much to ask on a $500 motherboard, much less a $700 "world record" one.
     
    So now I gotta be all nitpicky and cranky at engineering (not at you, Lee. I know you're just the messenger.)
    • Hey look, the RGB controller (NXP LPC15U68) says "Z590 MCU" even though the SPI for it (JM3) is right there. Couldn't even be bothered to do literally a one line update!
    • The DXE required for dTPM is not only present, but fully loaded, and attached! Gee, why would you do that when that's not the fTPM DXE. And it's not a chain load. And wasting significant space in the BIOS, that's not best practices. Or even normal practices.
    • But hey at least they - oh, they didn't do the fTPM correctly, which certainly isn't going to help the stuttering issue. Now the DXE makes sense. Honestly I'm amazed it's even functional. No, engineering, I don't have better docs from AMD than you do on it. But I do have multiple working boards that report very differently.
    • ImageDevicePath(..6F4C-4C6B-B9D1-92DAA7199A84)) LoadedImage(AmiRedFishApi) ... just ... <sigh> are you even using it? I think we all know the answer is no when you're using a CSEL for the BIOS.
    • PS/2 DH at 14D? Uh, that should probably be immediately before PciBus when you're bypassing clock related problems with the other interfaces. (Unless you need PciBus to strap the SuperIO. I haven't worked with the one you're using.)
    • Why oh why did you attach the "Z590 MCU" direct to the USB3.0 instead of the 2.0 hub? I will agree there could be a valid reason, but darned if I could see one. Way too late now obviously. But it would have helped the USB failures under extreme overclocks.
    • Did nobody review SMBIOS? "BIOS ROM is socketed" (okay, the SPI header, so I might give you a pass on that one.) ECF major and minor 255, no pass on that one. Not reading processor serial. Stack of structures missing a type definition. Full credit for at least trying to label slots correctly, but WHY IS THERE AN RTL8111EPV LISTED? If there actually is an 8111EPV on the X570 Dark, then we got a real problem.
    I don't like being cranky and throwing people under the bus, because BIOS development is hard as hell. But if they're just gonna keep pushing the "debug" lie, then they've got absolutely no excuses for not achieving absolute perfection with not one single mistake. They've got more "debug" headers than an AMD Lilac.
    Or they could just say "sorry, we don't have any officially tested or validated dTPMs at this time. Here are the pinouts we erroneously left out of the manuals, and we will fix the TPM selection in the next BIOS update. But we make no guarantees as to support of non-validated TPM modules."
     
    I should not have to call the engineering department out on the floor to get functionality on par with a $150 motherboard, and no amount of excuses about 'but overclocking' is going to change that fact. Especially not when boards that can directly compete on overclocking cost literally half as much with an arguably better feature set.

    "Yes, I can and have overclocked that."
    I have a watercooled 6900XTXH. Does more need said?
    Made your day? Fixed your problem? My associate code is 54G8OSEPHJY5C5D
    #19
    Oranwolf
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    Re: X570 FTW TPM 2022/02/16 10:01:47 (permalink)
    actualrootwyrm
    EVGATech_LeeM
    Double-checked with engineering.  It's a debug header.




    Clearly they think they're dealing with amateur hour or an idiot, and not somebody who might have more AMI licensing than they do, because they told you a straight up lie.
     
    JC2 is in fact, wired direct to the Winbond's LPC interface. JEC1 immediately above is either JTAG or SPI. And even if it is for LPC debug, the absolute minimum acceptable would be to provide the complete pinout. Keyed 20 is NOT a standard LPC connector or used by literally anything except two common LPC dTPM modules. Even ElmorLabs and OBT's LPC card uses 10 pins. And guess what? Yeah, LPC debug is done from the dTPM header!
    You don't populate the NXP's SPI header, but you leave another 25 pins fully populated for "debug only"? Look. I've been around decades. Nobody wastes that kind of money.
    Oh, and I already confirmed that the ground pins align with the 20-1 pin Asus / Gigabyte LPC TPM2.0 pinout. Which eliminates all other possibilities including JTAG. So yeah - I'm 100% certain they're lying. 

     
    So I'm just going to start calling engineering out on these lies. I honestly have to question if it wasn't deliberate sabotage to stay in Intel's good graces. There's literally no way EVGA did not know that fTPM is specifically advised against, that it has had security vulnerabilities in the past, that it has multiple outstanding known defects, and that TPM would be required for Windows 11. AMD won't even let you have AGESA access without you first acknowledging all of that. 
    These are super-premium priced motherboards. This level of either laziness or deliberate crippling just isn't acceptable, especially when it simply isn't found on boards that cost half as much.
    That goes triple for a board that is explicitly built for extreme overclocking and board-level modifications. You can't give users a Probelt, explicit permission to hook up DMMs and oscilloscopes, guarantees that replacing TIM won't void warranty, and then not provide detailed pinouts for every header you install. Doubly so when you give them detailed information on EVGA's hysteresis programming, 10+ pages of Nu Audio, and a completely unheard of 17 pages on how to set up RAID. $1000+ quad socket boards with dual U320 controllers didn't even have that many pages on RAID!
    Tacking on three more pages of pinout diagrams, not even remotely too much to ask on a $500 motherboard, much less a $700 "world record" one.
     
    So now I gotta be all nitpicky and cranky at engineering (not at you, Lee. I know you're just the messenger.)
    • Hey look, the RGB controller (NXP LPC15U68) says "Z590 MCU" even though the SPI for it (JM3) is right there. Couldn't even be bothered to do literally a one line update!
    • The DXE required for dTPM is not only present, but fully loaded, and attached! Gee, why would you do that when that's not the fTPM DXE. And it's not a chain load. And wasting significant space in the BIOS, that's not best practices. Or even normal practices.
    • But hey at least they - oh, they didn't do the fTPM correctly, which certainly isn't going to help the stuttering issue. Now the DXE makes sense. Honestly I'm amazed it's even functional. No, engineering, I don't have better docs from AMD than you do on it. But I do have multiple working boards that report very differently.
    • ImageDevicePath(..6F4C-4C6B-B9D1-92DAA7199A84)) LoadedImage(AmiRedFishApi) ... just ... <sigh> are you even using it? I think we all know the answer is no when you're using a CSEL for the BIOS.
    • PS/2 DH at 14D? Uh, that should probably be immediately before PciBus when you're bypassing clock related problems with the other interfaces. (Unless you need PciBus to strap the SuperIO. I haven't worked with the one you're using.)
    • Why oh why did you attach the "Z590 MCU" direct to the USB3.0 instead of the 2.0 hub? I will agree there could be a valid reason, but darned if I could see one. Way too late now obviously. But it would have helped the USB failures under extreme overclocks.
    • Did nobody review SMBIOS? "BIOS ROM is socketed" (okay, the SPI header, so I might give you a pass on that one.) ECF major and minor 255, no pass on that one. Not reading processor serial. Stack of structures missing a type definition. Full credit for at least trying to label slots correctly, but WHY IS THERE AN RTL8111EPV LISTED? If there actually is an 8111EPV on the X570 Dark, then we got a real problem.
    I don't like being cranky and throwing people under the bus, because BIOS development is hard as hell. But if they're just gonna keep pushing the "debug" lie, then they've got absolutely no excuses for not achieving absolute perfection with not one single mistake. They've got more "debug" headers than an AMD Lilac.
    Or they could just say "sorry, we don't have any officially tested or validated dTPMs at this time. Here are the pinouts we erroneously left out of the manuals, and we will fix the TPM selection in the next BIOS update. But we make no guarantees as to support of non-validated TPM modules."
     
    I should not have to call the engineering department out on the floor to get functionality on par with a $150 motherboard, and no amount of excuses about 'but overclocking' is going to change that fact. Especially not when boards that can directly compete on overclocking cost literally half as much with an arguably better feature set.



    I will be honest, a lot of this went over my head as a more casual user but it sounds like the Motherboards and BIOS could've been developed a bit better and that is unfortunate to heard considering we are paying a premium for what is supposed to be a premium product. 
    #20
    slickwicked616
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    Re: X570 FTW TPM 2022/02/17 18:33:59 (permalink)
    actualrootwyrm
    EVGATech_LeeM
    Double-checked with engineering.  It's a debug header.




    Clearly they think they're dealing with amateur hour or an idiot, and not somebody who might have more AMI licensing than they do, because they told you a straight up lie.
     
    JC2 is in fact, wired direct to the Winbond's LPC interface. JEC1 immediately above is either JTAG or SPI. And even if it is for LPC debug, the absolute minimum acceptable would be to provide the complete pinout. Keyed 20 is NOT a standard LPC connector or used by literally anything except two common LPC dTPM modules. Even ElmorLabs and OBT's LPC card uses 10 pins. And guess what? Yeah, LPC debug is done from the dTPM header!
    You don't populate the NXP's SPI header, but you leave another 25 pins fully populated for "debug only"? Look. I've been around decades. Nobody wastes that kind of money.
    Oh, and I already confirmed that the ground pins align with the 20-1 pin Asus / Gigabyte LPC TPM2.0 pinout. Which eliminates all other possibilities including JTAG. So yeah - I'm 100% certain they're lying. 

     
    So I'm just going to start calling engineering out on these lies. I honestly have to question if it wasn't deliberate sabotage to stay in Intel's good graces. There's literally no way EVGA did not know that fTPM is specifically advised against, that it has had security vulnerabilities in the past, that it has multiple outstanding known defects, and that TPM would be required for Windows 11. AMD won't even let you have AGESA access without you first acknowledging all of that. 
    These are super-premium priced motherboards. This level of either laziness or deliberate crippling just isn't acceptable, especially when it simply isn't found on boards that cost half as much.
    That goes triple for a board that is explicitly built for extreme overclocking and board-level modifications. You can't give users a Probelt, explicit permission to hook up DMMs and oscilloscopes, guarantees that replacing TIM won't void warranty, and then not provide detailed pinouts for every header you install. Doubly so when you give them detailed information on EVGA's hysteresis programming, 10+ pages of Nu Audio, and a completely unheard of 17 pages on how to set up RAID. $1000+ quad socket boards with dual U320 controllers didn't even have that many pages on RAID!
    Tacking on three more pages of pinout diagrams, not even remotely too much to ask on a $500 motherboard, much less a $700 "world record" one.
     
    So now I gotta be all nitpicky and cranky at engineering (not at you, Lee. I know you're just the messenger.)
    • Hey look, the RGB controller (NXP LPC15U68) says "Z590 MCU" even though the SPI for it (JM3) is right there. Couldn't even be bothered to do literally a one line update!
    • The DXE required for dTPM is not only present, but fully loaded, and attached! Gee, why would you do that when that's not the fTPM DXE. And it's not a chain load. And wasting significant space in the BIOS, that's not best practices. Or even normal practices.
    • But hey at least they - oh, they didn't do the fTPM correctly, which certainly isn't going to help the stuttering issue. Now the DXE makes sense. Honestly I'm amazed it's even functional. No, engineering, I don't have better docs from AMD than you do on it. But I do have multiple working boards that report very differently.
    • ImageDevicePath(..6F4C-4C6B-B9D1-92DAA7199A84)) LoadedImage(AmiRedFishApi) ... just ... <sigh> are you even using it? I think we all know the answer is no when you're using a CSEL for the BIOS.
    • PS/2 DH at 14D? Uh, that should probably be immediately before PciBus when you're bypassing clock related problems with the other interfaces. (Unless you need PciBus to strap the SuperIO. I haven't worked with the one you're using.)
    • Why oh why did you attach the "Z590 MCU" direct to the USB3.0 instead of the 2.0 hub? I will agree there could be a valid reason, but darned if I could see one. Way too late now obviously. But it would have helped the USB failures under extreme overclocks.
    • Did nobody review SMBIOS? "BIOS ROM is socketed" (okay, the SPI header, so I might give you a pass on that one.) ECF major and minor 255, no pass on that one. Not reading processor serial. Stack of structures missing a type definition. Full credit for at least trying to label slots correctly, but WHY IS THERE AN RTL8111EPV LISTED? If there actually is an 8111EPV on the X570 Dark, then we got a real problem.
    I don't like being cranky and throwing people under the bus, because BIOS development is hard as hell. But if they're just gonna keep pushing the "debug" lie, then they've got absolutely no excuses for not achieving absolute perfection with not one single mistake. They've got more "debug" headers than an AMD Lilac.
    Or they could just say "sorry, we don't have any officially tested or validated dTPMs at this time. Here are the pinouts we erroneously left out of the manuals, and we will fix the TPM selection in the next BIOS update. But we make no guarantees as to support of non-validated TPM modules."
     
    I should not have to call the engineering department out on the floor to get functionality on par with a $150 motherboard, and no amount of excuses about 'but overclocking' is going to change that fact. Especially not when boards that can directly compete on overclocking cost literally half as much with an arguably better feature set.




     
    wait wait wait, so my x570 ftw 500 dollar evga board has no tpm header????i shouldve double checked since it doesnt have a usb front header either
    bunch of nonsense
    #21
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