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Intel Could Upstage EPYC "Rome" Launch with "Cascade Lake" Before Year-end

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rjohnson11
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2018/11/17 00:14:25 (permalink)
https://www.anandtech.com/show/13611/intel-partner-discloses-cascade-lake-xeon-scalable-launch-window
 
Intel is reportedly working tirelessly to launch its "Cascade Lake" Xeon Scalable 48-core enterprise processor before year-end, according to a launch window timeline slide leaked by datacenter hardware provider QCT. The slide suggests a late-Q4 thru Q1-2019 launch timeline for the XCC (extreme core count) version of "Cascade Lake," which packs 48 CPU cores across two dies on an MCM. This launch is part of QCT's "early shipment program," which means select enterprise customers can obtain the hardware in pre-approved quantities. In other words, this is a limited launch, but one that's probably enough to upstage AMD's 7 nm EPYC "Rome" 64-core processor launch. It's only by late-Q1 thru Q2-2019 that the Xeon "Cascade Lake" family would be substantially launched, including lower core-count variants that are still 2-die MCMs. This aligns to preempt or match AMD's 7 nm EPYC family rollout through 2019. "Cascade Lake" is probably Intel's final enterprise microarchitecture to be built on the 14 nm++ node, and consists of 2-die multi-chip modules that feature 48 cores, and a 12-channel memory interface (6-channel per die); with 88-lane PCIe from the CPU socket. Hopefully AMD is keeping an eye on this and will respond accordingly.

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    Bruno747
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    Re: Intel Could Upstage EPYC "Rome" Launch with "Cascade Lake" Before Year-end 2018/11/17 00:35:56 (permalink)
    Other than memory channels what is being upstaged?

    48 vs 64 cores
    88 vs 128 pcie lanes (potentially even 3.0 vs 4.0)
    14nm vs 7nm
    Requires new board vs drop in backwards compatible
    Huge pricetag vs a fraction of that price
    First gen "glue" vs second gen "glue"

    Looks to me like the Intel rushed a response to epyc, especially rome and it's gonna be spanked before it even gets out of the gate?

    I'll also be curious to see intels frequency / wattage for this chip given the 28 core HEDT they showed needed phase change cooling and a dedicated circuit for cooling to run.
    post edited by Bruno747 - 2018/11/17 00:40:32

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    seth89
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    Re: Intel Could Upstage EPYC "Rome" Launch with "Cascade Lake" Before Year-end 2018/11/17 06:49:19 (permalink)
    I’m sure it will be affordable too.
    Bruno points are very good.
    At least intel is getting into the glue game.


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    TheMadDutchDude
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    Re: Intel Could Upstage EPYC "Rome" Launch with "Cascade Lake" Before Year-end 2018/11/17 09:53:11 (permalink)
    Who sniffs more glue? 
     
    Intel will no doubt have a massive price tag attached, and all of Bruno's points are exactly what AMD is banking on for them to win the market over. In my mind, there's no question with those points you've made. Intel are just clutching at straws and rushing it once more, just like when TR was first announced. 
     
    "Yeah?! Well! We have an 18 core Xtreeeeeemememe that will be on the market in 3 months at $800 more than your pathetic 16 core, but two more cores is what the people want!" Oh, and it's just a Xeon with an unlocked multi and different ID attached. Whoops, forgot to mention that.
     
    Round two... ding, ding, diiing!
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