This hasn't really been discussed here much, so some reasoned thoughts on this may be of use to someone still incluned to get an SR-2 or an SR-X.
 
x4 vs. x8
This refers to the bit-width of the chip. x4 chips are required for some of the more advanced server board features, such as chipkill. Boards relevant to readers of this thread (SR-2 and SR-X) don't have such features, and thus are unlikely to benefit from having x4 chips.
With x8 chips, half as many chips are required on the DIMM. Fewer chips means fewer components, cleaner design, less interference, cleaner signal, all of which means better reliability and OC-ability.
 
Summary: x8 DIMMs have half as many chips and thus may yield better stability, OC-ability and lower heat than x4 DIMMs
 
SR vs. DR vs. QR
Splitting memory into ranks reduces the load on the memory controller, but can also reduce performance. Each rank of memory is accessed separately, and electrically and electronically, a single DR DIMM is (or at least in theory should be) pretty indistinguishable from two SR DIMMs on the same memory channel. In practice we know this doesn't always work out the same way, e.g. I have had less luck with 6 DIMMs per CPU using SR DIMMs than with DR DIMMs on my SR-2 (although I may at some point re-visit this, my secondary SR-2 rig is using 6x8GB SR DIMM setup).
 
In theory, more ranks (ranks per DIMM times sockets per chanel) can yield higher performance because the instructions can be pipelined to overcome the latencies. In practice, outside of embedded electronics, this doesn't happen because the generic OS+application stack has no visibility of what goes on at that low a level, and while there may be some infinitesimal benefit with two ranks per channel, after that things will start to get worse rather than better, especially when going up to quad ranks per DIMM. At this point the synchronisation gets sufficiently complex that the whole memory bus has to get downclocked.
 
Each rank on a DIMM has a separate set of chips, so a DR DIMM will have twice as many chips on it as a SR DIMM of otherwise same specification.
 
Summary: SR DIMMs have half as many chips as DR DIMMs and may yield better stability, OC-ability and lower heat at least until you start pushing things out of spec (you should probably stick with the 48GB limit if you are experimenting with this). QR have twice as many chips against as DR, and typically require downclocking the bus by a notch.
 
Unfortunately, both of my SR-2s are now sorted for RAM (for the record, I am using 12x8GB DR x4 RDIMMs), so I am unlikely to be able to experiment with this further, but if anybody is looking at a fresh build from scratch, I hope the above info is useful to them.

The key points for 96GB are:
1) DR DIMMs (I _will_ re-try with SR ones, just for cross-check in the next week or two)
2) Manually set all the RAM timings and make sure commant rate is set to 2T.
3) Set the memory speed to 1333 and MCH strap to 1600 (MCH strap = 1333 also works for me if running completely non-overclocked with RAM at 1333MHz). Lowering the memory clock multiplier actually makes it worse

If you already have 6x8GB DIMMs, it's easy enough to test whether the above advice will work for you. Configure BIOS settings as I mentioned above, disable one of the CPUs, and put all 6 DIMMs on the enabled CPU. It should POST within a few attempts.