Monstieur
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www[dot]evga[dot]com/support/manuals/files/151-SX-E299.pdf According to page 27 of the manual for the X299 Dark, I can use: PE1/2/3/4/6 at x8/x8/x8/x8/x8 or PE1/4/6 at x16/x16/x8 which consumes 40 lanes. U.2(PU2) at x4 is hardwired to the CPU, so all 44 lanes are consumed. M.2(PM2) runs off the PCH in this case. So where are the x4 CPU lanes for U.2(PU1) / M.2(PM1) coming from?
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Sajin
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Re: 4 missing PCIe lanes
2018/10/19 07:32:04
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 07:36:23
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That’s still 4 more lanes than the CPU has. Something has to be disabled to use PU1 / PM1, but it’s not clear.
5 slots at x8 and PU2 is 44 lanes already.
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PINKTULIP
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Re: 4 missing PCIe lanes
2018/10/19 07:40:02
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Monstieur That’s still 4 more lanes than the CPU has. Something has to be disabled to use PU1 / PM1, but it’s not clear.
5 slots at x8 and PU2 is 44 lanes already.
MOBO :EVGA X299 DARK 151-SX-E299-KR BIOS :1.29 CPU : Intel Core i9-10900X Skylake-X 10-Core 3.7 GHz LCR :Corsair Hydro Series H80i V2 GPU :SAPPHIRE NITRO+ RX 6900 XT SE MEMORY: CORSAIR Dominator Platinum SE Torque 32GB (4 x 8GB) CMD32GX4M4C3200C14T SSD 01: SAMSUNG 970 PRO M.2 1TB NVMe SSD 02: SAMSUNG 860 PRO 256GBX2 Raid 0 PSU : Seosonic Prime Titanium SSR-1000TR 1000 Watts CASE :Thermaltake (Armor+) VH6000SWA SC :Creative Sound Blaster AE-9 5.1 Channels Monitor Acer XR382CQK IPS 3840x1600 @ 75HZ BD [/
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the_Scarlet_one
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Re: 4 missing PCIe lanes
2018/10/19 07:50:13
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Monstieur That’s still 4 more lanes than the CPU has. Something has to be disabled to use PU1 / PM1, but it’s not clear.
5 slots at x8 and PU2 is 44 lanes already.
First and foremost, just for clarification, where is someone using 5 cards that utilize x8 pci lanes all at once? More than likely, the middle slot, in between all of them, is dropping lanes because if you are occupying four pci lanes, why would there be a fifth item in between the other 4? Not very sure, but best guess so far. We can probably get evgaTech_LeeM to verify this.
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bcavnaugh
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Re: 4 missing PCIe lanes
2018/10/19 07:50:58
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Monstieur www[dot]evga[dot]com/support/manuals/files/151-SX-E299.pdf According to page 27 of the manual for the X299 Dark, I can use: PE1/2/3/4/6 at x8/x8/x8/x8/x8 or PE1/4/6 at x16/x16/x8 which consumes 40 lanes. U.2(PU2) at x4 is hardwired to the CPU, so all 44 lanes are consumed. M.2(PM2) runs off the PCH in this case. So where are the x4 CPU lanes for U.2(PU1) / M.2(PM1) coming from?
The Support Manual for EVGA X299 Dark (151-SX-E299) needs some updating to align it with the newer Bios 1.08. Other than the New Bios Features and Settings the info about the Lanes are correct. What you have left out in your Count are the Lanes that are used for the SATA Ports. Remember that PCIe Slots are Shared on this Motherboard as well.
post edited by bcavnaugh - 2018/10/19 07:59:12
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 07:58:40
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I have multiple add-on cards so I will use 40 lanes. Even if you have just 2-way SLI and a single x8 addon card that’s still 40 lanes.
Forget about M.2 completely and just consider U.2. This leaves just x4 for PU2. So where is PU1 getting its lanes from?
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bcavnaugh
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Re: 4 missing PCIe lanes
2018/10/19 08:00:02
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Monstieur I have multiple add-on cards so I will use 40 lanes. Even if you have just 2-way SLI and a single x8 addon card that’s still 40 lanes.
Forget about M.2 completely and just consider U.2. This leaves just x4 for PU2. So where is PU1 getting its lanes from?
The CPU PCIe Slot Breakdown (Skylake-X) PCIe Lane Distribution (Core i9-79xx, 44 Lane Processors) PE1 – x16 (Gen3, x16 lanes from CPU, x8 shared with PE2) PE2 – x16 (Gen3, x8 lanes from CPU, shares 8 of PE1’s 16 lanes) PE3 – x16 (Gen3, x8 lanes from CPU, shares 8 of PE4’s 16 lanes) PE4 – x16 (Gen3, x16 lanes from CPU, x8 shared with PE3) PE5 – x4 (Gen3, x4 lanes from PCH) PE6 – x16 (Gen3, x8 lanes from CPU or x4 from PCH based on configuration) When populated by a video card x8 Gen3 lanes are allocated from the CPU When populated by a card using x4 or x1 lanes, and M.2 80mm slot is populated PE6 receives x4 lanes from the PCH M.2 and U.2 Slot Breakdown (Skylake-X) PCIe Lane Distribution (Core i9-79xx, 44 Lane Processors) U.2(PU1) x4 PCIe Gen 3 lanes from CPU Must be enabled in BIOS, which disables M.2 110mm U.2(PU2) x4 PCIe Gen 3 lanes from CPU M.2 Key-M (110mm) PM1 – x4 PCIe Gen 3 lanes from CPU Supports PCIe/NVMe only Must be enabled in BIOS, which disables U.2(PU1) M.2 Key-M (80mm) PM2 – x4 PCIe Gen 3 lanes CPU or PCH based on configuration. Supports Optane™/PCIe/NVMe If PE6 is populated by a video card (anything using x8 lanes) this receives x4 lanes from PCH, otherwise x4 lanes from the CPU are used when PE6 is empty. M.2 Key-E (32mm) PE – x1 PCH lane
post edited by bcavnaugh - 2018/10/19 08:20:10
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 08:01:26
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bcavnaugh What you have left out in your Count are the Lanes that are used for the SATA Ports.
SATA uses the PCH. I am only talking about the PCIe slots and U.2 ports which only support CPU lanes. There aren’t enough lanes for two U.2 ports.
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 08:02:52
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The CPU only has 44 lanes. Two U.2 ports and the PCIe slots require 48 lanes. The PCIe slots do not drop below x8.
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the_Scarlet_one
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Re: 4 missing PCIe lanes
2018/10/19 08:07:26
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Monstieur The CPU only has 44 lanes. Two U.2 ports and the PCIe slots require 48 lanes. The PCIe slots do not drop below x8.
An x16 lane should run down to x1. Hence why installing an x1 card in an x16 lanes only utilized one lane. It should be up to x8 maximum. What devices are you using to utilize all of the lanes?
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 08:14:40
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the_Scarlet_one An x16 lane should run down to x1. Hence why installing an x1 card in an x16 lanes only utilized one lane. It should be up to x8 maximum.
What devices are you using to utilize all of the lanes?
RAID card, GPU, 40 GB/s USB card, two PCIe SSDs. The PCIe x16 slots will not drop below x8 CPU lanes on this board even if an x4 or x1 card is installed. There aren’t enough lanes for two U.2 ports. Something has to get disabled but the manual doesn’t mention what. Also, running at x1 doesn’t allow the lanes to be used elsewhere. Only certain contiguous groups of lanes from the CPU can be allocated according to the Skylake-X PCIe lane partitioning scheme.
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bcavnaugh
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Re: 4 missing PCIe lanes
2018/10/19 08:20:22
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Intel ® X299 PCH (Southbridge) The Platform Controller Hub (PCH) handles the role that was previously held by the South Bridge. On X299 motherboards, the CPU and PCH are directly linked via DMI 3.0, which uses 4 lanes to provide transfer rates at up to 8 GT/s per lane. From there, the PCH allocates bandwidth to smaller PCIe slots and devices, such as M.2 Key-E, USB, audio, etc. In simplified terms, the PCH works as a hub for peripherals that are less bandwidth-intensive. SATA Ports: Intel ® X299 PCH Controller See Above
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the_Scarlet_one
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Re: 4 missing PCIe lanes
2018/10/19 08:21:51
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Let’s see if we can get Lee_M to chime in. I am pretty sure the lanes still reduce down and the x8 is a max, not a minimum.
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 08:22:01
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bcavnaugh Intel ® X299 PCH (Southbridge) The Platform Controller Hub (PCH) handles the role that was previously held by the South Bridge. On X299 motherboards, the CPU and PCH are directly linked via DMI 3.0, which uses 4 lanes to provide transfer rates at up to 8 GT/s per lane. From there, the PCH allocates bandwidth to smaller PCIe slots and devices, such as M.2 Key-E, USB, audio, etc. In simplified terms, the PCH works as a hub for peripherals that are less bandwidth-intensive. SATA Ports: Intel ® X299 PCH Controller See Above
The U.2 ports on this board don’t use the PCH. They only use CPU lanes.
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arestavo
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Re: 4 missing PCIe lanes
2018/10/19 08:22:15
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I don't know about the Dark, but the X299 FTW K has four PCIE 3.0 lanes on the motherboard chipset (DMI 3.0) that can be shared depending on what is plugged in. Those lanes can aggregate more than just 4 PCIE lanes (think cable internet shared bandwidth), and so are not as good as on-the-die CPU PCIE lanes. I'd assume the same is true for the X299 Dark.
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Monstieur
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Re: 4 missing PCIe lanes
2018/10/19 08:23:51
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the_Scarlet_one Let’s see if we can get Lee_M to chime in. I am pretty sure the lanes still reduce down and the x8 is a max, not a minimum.
On the Supermicro X299 board the last x8 slot does drop to x4 when both U.2 ports are used.
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the_Scarlet_one
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Re: 4 missing PCIe lanes
2018/10/19 08:28:31
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Are you considering the Dark motherboard strictly because of the quantity of pci lanes?
I am curious, because it seems like a different board would be far more suitable for the tasks you are looking to accomplish. The dark is overclocking focused, not feature focused, so it may hinder your needs rather than help.
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simplyfabio
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Re: 4 missing PCIe lanes
2018/10/19 08:45:21
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☄ Helpfulby Monstieur 2018/10/19 12:21:40
Ok guys, this is explained well in these thread: https://forums.evga.com/Mucho-questions-about-X299-Dark-m2848045.aspx But, I can share my config and confirm that: 4 CPU LANE = SSD U.2 through PU2 ( SHARED/TAKEN WITH/FROM PE6!! This detail is MISSING FROM THE MANUAL!!) 4 CPU LANE = SSD M.2 through PM1 (SHARED WITH PU1, automatically disabled) 8 CPU LANE = GPU SLOT 1 (SHARED WITH SLOT 2) 8 CPU LANE = GPU SLOT 2 (SHARED WITH SLOT 1) 16 CPU LANE = GPU SLOT 4 4 CPU LANE = SSD PCIE Through PE6 ( 8 LANE IN TOTAL, 4 SHARED WITH PU2 BECAUSE IS POPULATED) MY TOTAL IS 44 CPU LANE USED. In addition, PM2 populated with an M.2 SSD GET 4 LANE FROM PCH (BECAUSE PE6 IS CPU ROUTED) Everything working simultaneously!!
post edited by simplyfabio - 2018/10/19 08:52:28
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bcavnaugh
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Re: 4 missing PCIe lanes
2018/10/19 08:47:48
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the_Scarlet_one
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Re: 4 missing PCIe lanes
2018/10/19 08:49:44
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simplyfabio Ok guys, this is explained well in these thread: https://forums.evga.com/Mucho-questions-about-X299-Dark-m2848045.aspx But, I can share my config and confirm that: 4 CPU LANE = SSD U.2 through PU2 (SHARED/TAKEN WITH/FROM PE6!! This detail is MISSING FROM THE MANUAL!!) 4 CPU LANE = SSD M.2 through PM1 (PU1 automatically disabled) 8 CPU LANE = GPU SLOT 1 (SHARED WITH SLOT 2) 8 CPU LANE = GPU SLOT 2 (SHARED WITH SLOT 1) 16 CPU LANE = GPU SLOT 4 4 CPU LANE = SSD PCIE Through PE6 (8 LANE IN TOTAL, 4 SHARED WITH PU2 BECAUSE IS POPULATED) MY TOTAL IS 44 CPU LANE USED. In addition, PM2 populated with an M.2 SSD GET 4 LANE FROM PCH (BECAUSE PE6 IS CPU ROUTED) Everything working simultaneously!!
Thanks simplyfabio! I figured one of the lanes dropped below x8. If it is just a missing detail, that is a good thing to know :-)
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simplyfabio
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Re: 4 missing PCIe lanes
2018/10/19 08:57:20
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☼ Best Answerby Monstieur 2018/10/19 12:21:50
Monstieur I have multiple add-on cards so I will use 40 lanes. Even if you have just 2-way SLI and a single x8 addon card that’s still 40 lanes.
Forget about M.2 completely and just consider U.2. This leaves just x4 for PU2. So where is PU1 getting its lanes from?
To be verified, BUT, I think that PU1 and PM1 are CPU routed to CPU and shared between each other. PE6 is somehow connected to PU2. When I have PU2, PE6 dropdown to x4. Then I guess, with PE6 populated by a GPU x8, PU2 is disabled! ( IF TRUE, THIS IS ALSO MISSING FROM THE MANUAL)
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GGTV-Jon
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Re: 4 missing PCIe lanes
2018/10/19 09:10:22
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simplyfabio Ok guys, this is explained well in these thread: https://forums.evga.com/Mucho-questions-about-X299-Dark-m2848045.aspx But, I can share my config and confirm that: 4 CPU LANE = SSD U.2 through PU2 (SHARED/TAKEN WITH/FROM PE6!! This detail is MISSING FROM THE MANUAL!!) 4 CPU LANE = SSD M.2 through PM1 (SHARED WITH PU1, automatically disabled) 8 CPU LANE = GPU SLOT 1 (SHARED WITH SLOT 2) 8 CPU LANE = GPU SLOT 2 (SHARED WITH SLOT 1) 16 CPU LANE = GPU SLOT 4 4 CPU LANE = SSD PCIE Through PE6 (8 LANE IN TOTAL, 4 SHARED WITH PU2 BECAUSE IS POPULATED) MY TOTAL IS 44 CPU LANE USED. In addition, PM2 populated with an M.2 SSD GET 4 LANE FROM PCH (BECAUSE PE6 IS CPU ROUTED) Everything working simultaneously!!
Good Job simplyfabio I think part of what the OP was missing is that not all of the PCIe slots will connect too the CPU and was missing where it straight out said things were connected too the PCH PE5 – x4 (Gen3, x4 lanes from PCH) PE6 – x16 (Gen3, x8 lanes from CPU or x4 from PCH based on configuration) o When populated by a video card x8 Gen3 lanes are allocated from the CPU o When populated by a card using x4 or x1 lanes, and M.2 80mm slot is populated PE6 receives x4 lanes from the PCH
Plus the fact that PM2 is toggle able between CPU and PCH as well depending on PCIe slot break down Also just because you have an PCIe socket in 16x size doesn't mean it cannot go down to 1x Video cards are 16x or 8x, everything else is whatever they labeled at
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simplyfabio
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Re: 4 missing PCIe lanes
2018/10/19 09:16:39
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GGTV-Jon
simplyfabio Ok guys, this is explained well in these thread: https://forums.evga.com/Mucho-questions-about-X299-Dark-m2848045.aspx But, I can share my config and confirm that: 4 CPU LANE = SSD U.2 through PU2 (SHARED/TAKEN WITH/FROM PE6!! This detail is MISSING FROM THE MANUAL!!) 4 CPU LANE = SSD M.2 through PM1 (SHARED WITH PU1, automatically disabled) 8 CPU LANE = GPU SLOT 1 (SHARED WITH SLOT 2) 8 CPU LANE = GPU SLOT 2 (SHARED WITH SLOT 1) 16 CPU LANE = GPU SLOT 4 4 CPU LANE = SSD PCIE Through PE6 (8 LANE IN TOTAL, 4 SHARED WITH PU2 BECAUSE IS POPULATED) MY TOTAL IS 44 CPU LANE USED. In addition, PM2 populated with an M.2 SSD GET 4 LANE FROM PCH (BECAUSE PE6 IS CPU ROUTED) Everything working simultaneously!!
Good Job simplyfabio I think part of what the OP was missing is that not all of the PCIe slots will connect too the CPU and was missing where it straight out said things were connected too the PCH
PE5 – x4 (Gen3, x4 lanes from PCH) PE6 – x16 (Gen3, x8 lanes from CPU or x4 from PCH based on configuration) o When populated by a video card x8 Gen3 lanes are allocated from the CPU o When populated by a card using x4 or x1 lanes, and M.2 80mm slot is populated PE6 receives x4 lanes from the PCH
Plus the fact that PM2 is toggle able between CPU and PCH as well depending on PCIe slot break down Also just because you have an PCIe socket in 16x size doesn't mean it cannot go down to 1x Video cards are 16x or 8x, everything else is whatever they labeled at
I think they just should say "When populated by a card using x4 or x1 lanes, and M.2 80mm slot is populated PE6 receives x4 lanes from the PCH: if not it took x4 lanes from CPU"PU2 take x4 CPU lines from PE6 slot"
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GGTV-Jon
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Re: 4 missing PCIe lanes
2018/10/19 09:43:15
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Someone else posted this the other day and I cannot remember who it was or what thread it was in so I cannot give credit for the find - GN talks about PCIe lanes and how things get split to the PCH -
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brazil
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Re: 4 missing PCIe lanes
2018/10/19 10:01:22
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I wanted to buy a X299 Dark, but I finally got confused with PCI-E slots. I planned to install 4 video cards and an M2 SSD. But after reading the forum, I did not understand the slot allocation scheme. Why can't I install video cards in slots 1,2,4 and 6, and connect M2 to slot 80mm M2 through PCH 4x?
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simplyfabio
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Re: 4 missing PCIe lanes
2018/10/19 10:13:50
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brazil I wanted to buy a X299 Dark, but I finally got confused with PCI-E slots. I planned to install 4 video cards and an M2 SSD. But after reading the forum, I did not understand the slot allocation scheme. Why can't I install video cards in slots 1,2,4 and 6, and connect M2 to slot 80mm M2 through PCH 4x?
No one have said that. You can HAVE IT (and can also have 4GPU in those slots and the M.2 to PM1 routed to CPU)
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GGTV-Jon
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Re: 4 missing PCIe lanes
2018/10/19 10:21:43
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Think of it this way. You have 44 lanes, take 4 right off the top for the DMI interface. Leaving 40 lanes. 4 GPUs at 8x each is 32 lanes leaving 8 lanes to be used for other stuff. Anything else requiring lanes 4x and lower will be pushed to the PCH
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simplyfabio
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Re: 4 missing PCIe lanes
2018/10/19 10:41:34
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GGTV-Jon Think of it this way. You have 44 lanes, take 4 right off the top for the DMI interface. Leaving 40 lanes. 4 GPUs at 8x each is 32 lanes leaving 8 lanes to be used for other stuff
Are you sure if he/she use the third GPU at x8, that lane are routed to something else? I don't think so. In his/her case the lane allocation will be: x8 PE1 x8 PE2 x16 PE4 x8 PE6 Leaving only x4 left and can be or PM1 or PU1. Of course he can use the PM2 to PCH. Also for this, I am pretty sure the x299 platform has pure 44CPU and the extra x4 for the DMI are out of those.
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GGTV-Jon
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Re: 4 missing PCIe lanes
2018/10/19 10:54:29
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If running 4 GPUs it will be 8x on each. Yes, the DMI lanes are taken out of the 44 lanes not in addition too the 44
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