The way the PCIe Controllers are in the chips limits the way it can function.

The 40 lane chips can have up to 5 blocks of x8, 4 blocks are used in the top two x16 x16 slots, leaving the last 8 lanes for either Slot 3, or the M.2 slot.

The 28 lane chips have 3 blocks of x8 and 1 block of x4, the 3 blocks of x8 are used in the top two x16 x8 slots, then the last x4 block is left for either Slot 3 or the M.2 slot.

Without more sophisticated PCIe lane switching (which would take up more board space, increase latency, is more complex to design around and a whole host of other things), having both functions available at the same time is a no-go.

Just be happy that the M.2 slot runs at PCIe 3.0 x4 unlike a lot of X99 motherboards which only use 2.0 x2/x4.