Hi guys. When I upgraded my machine from the X58/Xeon 5680 to the X99/6900 recently I pulled the Swiftech water block off my Xeon because I planned to reuse it on the 6900 (ended up I couldn't because i had the wrong mounting screws, so I bought an EK instead...).
This is what I saw. This was actually my second mount of the Swiftech block on that Xeon. I was seeing a certain core get 9-10 C higher than the other cores all of the time with my first mount. I pulled it off that time, the TIM looked good (didn't look like this), I applied new TIM, remounted, and still got that core running hotter than the others, so I went with it, and it ran well even overclocked to 4.125ghz for most of the last year.
This time the mount was clearly bad, as it left a fairly large spot on the IHS completely barren of TIM. As you can see, I clearly didn't use too little TIM - if anything, I used too much. It still didn't result in TIM squeezing into that one spot for some reason. I'm not sure why. There was enough heat diffusion through the IHS to the other parts of the block that had good contact that it didn't stop the chip from running well, there was just that one hot core. I'd done some reading that suggested this was common, so I didn't worry about it.
I'm trying to remember what pattern I used at the time. I think it was just a big blob in the middle of the chip. This was with Prolimatech PK-3, which is a much thicker paste than, say, EK's ektotherm. The ektotherm is much runnier in comparison, and I doubt this would have happened with the Ektotherm.
Anyhow, this pic serves more as a cautionary tale about making sure to get a good heatsink/water block mount. I'll never know exactly why this happened. I suspect that either the IHS or the Swiftech block had some subtle warpage in that area that prevented good contact. Thing is, if there were a larger void there I'd have expected the TIM to squeeze
into the void rather than away from it (path of least resistance). So maybe it was a high spot that was in too much contact so the TIM couldn't squeeze into it, and let too much gap between the rest of the block and the IHS, so the rest of the interface got more TIM. Who knows.